Display Circuit Switching Through Overlapping Vertical Blanking

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Solution Overview

Problem

Existing display systems face issues with synchronization continuity during video signal switching, leading to unstable synchronization and image distortion due to asynchronous vertical synchronization signals, which compromises display visual quality.

Innovation Solution

A circuit apparatus with an internal image data output circuit, input circuit, selection circuit, and control circuit that adjusts the frame rate of internal image data during a switching period and switches between internal and input image data in the vertical blanking periods to maintain synchronization continuity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If asynchronous video signal switching is performed without frame rate adjustment, then switching speed is improved, but synchronization continuity deteriorates causing image distortion

Engineering Contradiction:
Improveswitching speedVSAvoidsynchronization continuity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The control circuit performs preliminary frame rate adjustment on the internal image data before switching occurs. By advancing the frame rate modification in the switching period before the actual signal switch, the system ensures that both video signals are synchronized when switching happens, preventing synchronization discontinuity and image distortion while maintaining fast switching capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the frame rate parameter of the internal image data dynamically during the switching period. The control circuit adjusts the frame rate to match the input video signal's frame rate, transforming the internal data from asynchronous to synchronous state. This parameter modification ensures synchronization continuity without compromising switching speed

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If video signal switching occurs between non-overlapping vertical blanking periods, then switching simplicity is improved, but display quality deteriorates due to synchronization gaps

Engineering Contradiction:
Improveswitching simplicityVSAvoiddisplay quality
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The invention introduces an intermediary timing adjustment mechanism that mediates between the internal image data and input video signal. By adjusting the frame rate of internal data to create overlapping vertical blanking periods, the system finds a common timing window for switching that satisfies both simplicity and quality requirements, acting as a bridge between the two asynchronous signals

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically adjusts the frame rate of internal image data based on the timing requirements for achieving overlapping vertical blanking periods. This dynamic parameter modification enables the system to adaptively synchronize signals during the switching period, ensuring high display quality while maintaining operational simplicity through automated timing control

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250218342A1Circuit Apparatus And Display System
Publication Date: 2025.07.03 SEIKO EPSON CORP
  • US20250218342A1 patent drawing
  • US20250218342A1 patent drawing
  • US20250218342A1 patent drawing

AI summary

A selection circuit selects any of internal image data or input image data and outputs selected image data. An output circuit outputs output image data based on the selected image data. A control circuit controls an internal image data output circuit to output the internal image data at a frame rate different from that of the input image data in a switching period from the internal image data to the input image data. The control circuit controls the selection circuit to switch from the internal image data to the input image data in an overlap period between a vertical blanking period of the internal image data and a vertical blanking period of the input image data.