Display Device Clock Embedded Interface EMI Reduction
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Solution Overview
Problem
High work frequencies in integrate circuits within display devices lead to significant electromagnetic interference (EMI) during data transmission, affecting the efficiency and reliability of data exchange between various circuits.
Innovation Solution
A clock embedded point-to-point interface is implemented between the timing control circuit and the data driving circuit, where the timing control circuit generates multiple clock signals with different frequencies, allowing the data driving circuit to adjust its frequency through clock training, thereby reducing EMI and ensuring accurate data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high work frequencies are used in integrate circuits, then productivity and processing speed are improved, but electromagnetic interference during data transmission increases
Solution Approach 1:
The patent applies dynamics by making the clock frequency adjustable rather than fixed. The data driving circuit can dynamically select different clock frequencies (first clock signal or second clock signal) based on transmission conditions, allowing the system to optimize between speed and EMI reduction for different operating scenarios
Solution Approach 2:
The patent changes the frequency parameter of the clock signal to resolve the contradiction. By providing multiple clock signals with different frequencies and selecting appropriate frequencies for data transmission, the system can reduce EMI while maintaining necessary productivity. The frequency parameter is explicitly changed based on transmission requirements
2Object-generated harmful factors
If multiple clock signals with different frequencies are generated and selected, then electromagnetic interference is reduced, but device complexity increases
Solution Approach 1:
The timing control circuit is designed with multi-functionality, serving both as a clock generator and a frequency selector. It can generate multiple clock signals and select appropriate ones for different transmission scenarios, reducing the need for separate dedicated circuits for each function and thereby managing complexity
Solution Approach 2:
The patent merges the clock generation and frequency selection functions into a single timing control circuit. By combining these functions, the system reduces the number of separate components and interconnections, thereby managing overall device complexity while still providing multiple frequency options for EMI reduction
Data Source
AI summary
A display device includes a timing control circuit and a data driving circuit. The data driving circuit receives the first clock embedded training data from the timing control circuit, performs a first clock training to adjust a work frequency of the data driving circuit to be equal to the frequency of a first clock signal, and receives the first clock embedded image data from the timing control circuit. The data driving circuit also receives a second clock embedded training data from the timing control circuit, performs a second clock training to adjust a work frequency of the data driving circuit to be equal to the frequency of a second clock signal, and receives the second clock embedded image data from the timing control circuit. The frequency of the first clock signal is different from a frequency of the second clock signal.