Display Device Clock Generator for Multi-Mode Operation

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Solution Overview

Problem

Conventional LCD devices are limited to a specific operating mode corresponding to a fixed frequency of the main operating clock, making them incompatible with different operating modes such as changes in display resolution or switching between full screen and zoom-in modes.

Innovation Solution

A display device and driving method that include an input signal generator producing signals at various frequencies for different operating modes, a main operating clock generator using a phase locked loop (PLL) circuit to adjust the main frequency of the clock while maintaining a constant reference frequency, and a control signal generator producing signals that change with the main clock frequency, allowing compatibility with multiple operating modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed frequency main operating clock is used, then the device structure is simple, but the adaptability to different operating modes is poor

Engineering Contradiction:
Improvecompatibility with different operating modesVSAvoidsignal processing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The main operating clock frequency is made dynamically adjustable based on the detected input signal frequency. The system automatically adapts the clock frequency to match different operating modes (e.g., 60Hz for NTSC, 50Hz for PAL) without requiring manual configuration or complex signal processing circuits.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs self-configuration by automatically detecting the input signal frequency and autonomously adjusting the main operating clock frequency accordingly. This eliminates the need for external intervention or complex control logic to switch between different operating modes.

Inventive Principle:
Principle #25Self-service

2Adaptability or versatility

If the main operating clock frequency is adjusted for different modes, then the adaptability improves, but the device complexity increases

Engineering Contradiction:
Improveoperating mode compatibilityVSAvoidclock generation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system changes the frequency parameter of the main operating clock to adapt to different operating modes. By adjusting this single critical parameter, the system achieves compatibility with multiple standards (NTSC, PAL, SECAM) without modifying the underlying hardware architecture or adding complex signal processing circuits.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The clock generation circuit is designed to perform multiple functions by generating different frequencies from a single circuit architecture. The same circuit can produce 60Hz, 50Hz, or other frequencies as needed, eliminating the need for separate clock circuits for each operating mode and reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the display device to operate stably across various modes by adjusting the input frequency to match the required main frequency, ensuring seamless transitions between modes without complex signal processing, and applies to analog type displays like LCDs, OLEDs, and PDPs.

Implementation Method 1

a main operating clock generator generating a main operating clock using the input signal and a reference signal, wherein a main frequency of the main operating clock varies in accordance with the input frequency

Methodology Applied
Scientific EffectPhase locked loop (PLL):

Data Source

PatentUS8223106B2Display device and driving method thereof
Publication Date: 2012.07.17 LG DISPLAY CO LTD
  • US8223106B2 patent drawing
  • US8223106B2 patent drawing
  • US8223106B2 patent drawing

AI summary

A driving circuit for a display device includes an input signal generator generating an input signal having one of a plurality of input frequencies corresponding to a respective one of a plurality of operating modes of the display device; a main operating clock generator responsive to the one of the plurality of frequencies to generating a main operating clock, a main frequency of the main operating clock varying in accordance with the one of the plurality of frequencies; and a control signal generator generating a control signal using the main operating clock, wherein the control signal changes in accordance with the main frequency.