Display Shift Register Clock Masking for Lower Power Draw

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Solution Overview

Problem

Existing display devices experience unintentional power consumption due to clock signals being supplied to shift registers, even when data signals are not being output, leading to inefficiency.

Innovation Solution

A masking circuit is introduced to generate output clock signals by masking portions of the clock signal, ensuring that only necessary stages receive the clock signal, thereby reducing unnecessary power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If clock signals are continuously supplied to shift registers, then the shift registers can continuously operate and generate data signals, but unintentional power consumption occurs when data signals are not being output

Engineering Contradiction:
Improvepower consumptionVSAvoidcontinuous operation capability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies periodic action by masking the clock signal during periods when data output is not required. The masking circuit selectively blocks the clock signal during idle periods while allowing it to pass during active data output periods, creating a periodic on/off pattern that eliminates unnecessary power consumption while maintaining operational reliability when needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent extracts the harmful element (continuous clock signal) from the system during idle periods. By using a masking circuit to remove the clock signal during periods when data is not being output, the solution separates the clock signal delivery into only when it is actually needed, thereby eliminating the power waste associated with continuous operation.

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of energy

If a masking circuit is introduced to selectively mask clock signals, then power consumption is reduced by preventing unnecessary clock signal supply, but device complexity increases due to additional circuit components

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The masking circuit is designed to perform multiple functions: it masks the clock signal during idle periods to save power, and simultaneously enables the clock signal during active periods to maintain normal operation. This multi-functionality allows a single circuit component to handle both power savings and operational requirements without needing separate circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The masking circuit acts as an intermediary between the clock signal source and the shift registers. It mediates the clock signal delivery by conditionally blocking or passing the signal based on whether data output is required, thereby implementing power savings without directly modifying the shift register structure or the clock signal source.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If clock signals are masked during certain sections, then unnecessary power consumption is minimized, but the timing and synchronization of data signal generation must be precisely controlled

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal timing control
Core Design Contradiction:
Loss of energyVSDifficulty of detecting and measuring

Solution Approach 1:

The masking circuit uses feedback from the data signal status to control clock signal masking. By monitoring whether data signals are currently being output and adjusting the clock signal delivery accordingly, the system automatically synchronizes clock masking with data output requirements, eliminating the need for complex external timing control while saving power.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250349243A1Display device and electronic device including the display device
Publication Date: 2025.11.13 SAMSUNG DISPLAY CO LTD
  • US20250349243A1 patent drawing
  • US20250349243A1 patent drawing
  • US20250349243A1 patent drawing

AI summary

A display device according to embodiments of the present invention includes a controller configured to generate a start signal and a clock signal, a masking circuit configured to generate output clock signals by masking at least a portion of the clock signal, and a plurality of stages configured to receive an output clock signal of the output clock signals in response to the start signal and output a data signal. The masking circuit is configured to receive data signals respectively output from a stage of the plurality of stages and at least one other stage disposed adjacent to the stage.