Display Device Clock Signal Merging to Reduce Pad Count

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Solution Overview

Problem

Display devices face increased vulnerability to static electricity and layout area requirements due to the number of pads needed to couple a display panel with a driving integrated circuit, which increases as the number of signals increases.

Innovation Solution

A display device design that reduces the number of signals to a scan driver and emission driver by using a common clock signal system, where the emission driver and scan driver share clock lines through coupling lines, reducing the number of pads and clock lines required, thereby minimizing static electricity defects and layout area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of signals provided to scan driver and emission driver is increased, then the display device functionality is improved, but the number of pads required increases

Engineering Contradiction:
Improvedisplay device functionalityVSAvoidnumber of pads
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent combines the clock signal lines for the scan driver and emission driver into a shared infrastructure. The emission driver receives first and second clock signals through dedicated clock lines, while the scan driver receives the same clock signals through coupling lines connected to the emission driver's clock lines. This merging of clock signal distribution reduces the total number of pads required from the driving integrated circuit.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If the number of pads required to couple display panel and driving integrated circuit is increased, then more signals can be provided, but the layout area required increases

Engineering Contradiction:
Improvesignal provision capabilityVSAvoidlayout area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the clock signal distribution paths by having the scan driver receive clock signals through coupling lines from the emission driver rather than through separate dedicated pads. This reduces the number of pads needed and consequently decreases the layout area required for the display device.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If the number of pads is increased, then more signals can be transmitted, but the vulnerability to static electricity increases

Engineering Contradiction:
Improvesignal transmission capabilityVSAvoidstatic electricity vulnerability
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent reduces the number of pads by merging the clock signal distribution system. The emission driver and scan driver share the same clock signal paths through the coupling line architecture, reducing the total pad count and thereby reducing the display panel's vulnerability to static electricity damage.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10140926B2Display device and electronic device having the same
Publication Date: 2018.11.27 SAMSUNG DISPLAY CO LTD
  • US10140926B2 patent drawing
  • US10140926B2 patent drawing
  • US10140926B2 patent drawing

AI summary

A display device includes a pixels unit and a driving unit. The driving unit includes an emission driver coupled to a first clock line and a second clock line and configured to receive therefrom a first clock signal and a second clock signal, respectively, and to generate an emission control signal provided to the pixels based on the first clock signal and the second clock signal and a scan driver coupled to the emission driver through a first coupling line and a second coupling line, the scan driver configured to receive the first clock signal and the second clock signal from the emission driver and to generate a scan signal provided to the pixels based on the first clock signal and the second clock signal.