Display Clock Supply Circuit Overcurrent Detection
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Solution Overview
Problem
Existing display apparatuses face reduced operation stability due to short detection times for overcurrents, which can occur from defects like short circuits between signal lines, especially in high-speed or high-resolution displays.
Innovation Solution
A display apparatus and method that includes a clock supply circuit applying test voltages to output terminals immediately after power application, allowing for a longer detection time of overcurrents by maintaining a defective current path for a prolonged period, thereby enhancing detection accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If overcurrent detection is performed during display driving in high-speed or high-resolution displays, then the display operates at high performance, but the detection time becomes too short to achieve accurate overcurrent detection
Solution Approach 1:
The patent applies preliminary action by performing overcurrent detection before normal display driving begins. A test voltage is applied to the gate line during an initialization period (before actual image display) to detect potential short circuits. This allows sufficient detection time without compromising display performance, as the detection occurs in advance when the system is not yet in high-speed operation mode.
2Measurement precision
If the detection time is extended to improve overcurrent detection accuracy, then detection precision increases, but the time required for system initialization increases
Solution Approach 1:
The patent implements periodic action by applying test voltages at specific intervals during the initialization period. Rather than continuously monitoring, the system applies test voltages periodically to gate lines at predetermined timing (e.g., during vertical synchronization periods or frame initialization). This approach provides sufficient detection accuracy while minimizing the time added to system initialization.
3Reliability
If test voltages are applied to all gate lines simultaneously, then detection coverage is maximized, but the complexity of control circuits increases
Solution Approach 1:
The patent applies segmentation by dividing gate lines into multiple groups and applying test voltages to different groups at different timing. Instead of simultaneously testing all gate lines, the system segments them into subsets (e.g., based on gate driver channels or timing phases) and performs sequential testing. This reduces the instantaneous control complexity while maintaining comprehensive detection coverage across all gate lines.
Data Source
AI summary
A display apparatus includes a display panel driven based on a first gate clock and a second gate clock, a clock supply circuit including a first output terminal for an output of the first gate clock and a second output terminal for an output of the second gate clock, supplying the first output terminal with one of a gate high voltage and a gate low voltage as a first test voltage, and supplying the second output terminal with the other of the gate high voltage and the gate low voltage as a second test voltage, for a first time immediately after a system power is applied thereto, a power generator generating the gate high voltage and the gate low voltage and supplying the gate high voltage and the gate low voltage to the clock supply circuit, and an overcurrent detector receiving a flag signal to recognize overcurrent from the power generator to shut down the power generator, when the first output terminal and the second output terminal are short-circuited with each other at the first time interval.