Display Clock Recovery with Variable Duty Signal Selection
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Solution Overview
Problem
Existing clock recovery systems in display apparatuses are limited by fixed duty clock signals, restricting their ability to support various modes and applications.
Innovation Solution
A clock recovery system that includes an option source to store and provide changeable option information for defining clock signal duty, utilizing a clock recovery unit with a clock extraction unit, phase detector, charge pump, and delay line to generate and select delayed clock signals with varying duties, allowing for flexible clock signal recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed duty clock signal is used for clock recovery, then the clock signal can be recovered reliably, but the source driver cannot support various modes or applications
Solution Approach 1:
The patent implements a dynamic duty ratio adjustment mechanism where the source driver can change the duty ratio of the recovered clock signal based on different operating modes. The clock recovery unit includes a duty ratio controller that adjusts the duty ratio dynamically, allowing the same hardware to support both fixed and variable duty ratio requirements for different display modes and applications.
Solution Approach 2:
The patent changes the parameter of clock signal duty ratio from fixed to variable. By introducing an option source that provides different duty ratio settings and a controller that selects appropriate duty ratios based on operating conditions, the system can adapt the clock signal parameters to match different mode requirements while maintaining reliable clock recovery.
2Device complexity
If the clock signal duty is fixed, then the clock recovery process is simple, but additional information and mode information cannot be expressed
Solution Approach 1:
The patent makes the clock signal duty ratio serve multiple functions: it acts as both a timing signal for data recovery and as a carrier of mode information. By encoding different operating modes through different duty ratio values, the clock signal becomes a multi-functional signal that simultaneously performs timing and information transmission roles.
Solution Approach 2:
The patent performs preliminary action by pre-defining multiple duty ratio options in the option source before clock recovery begins. The system pre-configures different duty ratio values corresponding to different modes, allowing the receiver to quickly determine the operating mode by detecting the duty ratio without requiring separate information channels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables clock signal recovery at various duties, supporting multiple modes and applications by controlling the duty of the clock signal based on option information, enhancing the versatility of the source driver.
Implementation Method 1
a phase detector configured to detect a phase difference between the reference clock signal and a feedback clock signal
Implementation Method 2
a charge pump configured to provide a voltage control signal by performing a pull-up and pull-down operation corresponding to the phase difference, and control the level of the voltage control signal in response to the option information
Implementation Method 3
a delay line including a plurality of delay units connected in series to sequentially delay the reference clock signal, wherein the delay units output delayed clock signals corresponding to the reference clock signal and having different phases
Data Source
AI summary
Disclosed is a clock recovery system of a display apparatus including a clock recovery unit which uses changeable option information used for recovering a clock signal and defining a duty, generates delayed clock signals having the duty corresponding to the option information in a clock training section, and outputs one of the delayed clock signals as the clock signal.


