Active Matrix Display Column Driver Timing Control
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Solution Overview
Problem
Higher definition and larger liquid crystal display panels face challenges in supplying voltage to pixel electrodes within the limited time frame due to increased data line impedance, leading to degraded display quality and increased power consumption.
Innovation Solution
The implementation of an active matrix type display device with a column driver that includes buffer amplifiers and output switch circuits, where the output switch is controlled to be off during a predetermined period until the buffer amplifier output reaches the target voltage, and then switched on, allowing the voltage to be supplied to the data line, along with a delay in the scan signal phase to ensure efficient charge delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the data line impedance is increased to support higher definition and larger display panels, then the display resolution and size are improved, but the voltage supply time to pixel electrodes is insufficient and display quality degrades
Solution Approach 1:
The output switch is turned off in advance during a predetermined period before the buffer amplifier output reaches the target voltage. This preliminary action allows the buffer amplifier to charge the data line capacitance without loading it, ensuring that when the switch turns on, the voltage is already ready for immediate supply to pixel electrodes, thus resolving the time deficiency caused by high impedance
Solution Approach 2:
The scan signal phase is delayed dynamically to coordinate with the voltage supply timing. By adjusting the scan signal phase relative to the buffer amplifier output timing, the system optimizes the charge delivery window, allowing sufficient voltage supply time while maintaining proper synchronization with pixel selection
2Speed
If the buffer amplifier driving capability is increased to supply voltage faster to pixel electrodes, then the voltage supply speed is improved, but the power consumption increases
Solution Approach 1:
The output switch operates in a periodic manner, being turned off during a predetermined period and then turned on. This periodic control allows the buffer amplifier to operate in intermittent mode, charging the data line capacitance during the off-period and then delivering the stored charge to pixel electrodes during the on-period, thereby reducing average power consumption while maintaining fast voltage supply speed
Solution Approach 2:
The output switch acts as an intermediary between the buffer amplifier and the data line. By controlling the switch timing, the system decouples the buffer amplifier from continuous loading, allowing the buffer to charge capacitance stored in the data line rather than continuously supplying current, thus reducing power consumption while maintaining supply speed through the pre-stored charge
Data Source
AI summary
Disclosed is a display device including display unit, a column driver, a delay control circuit, an output switch control circuit, and a display controller. The display unit includes a plurality of pixel electrodes arranged at intersections between a plurality of data lines and a plurality of scan lines in a matrix form and TFTs. One of a drain and a source of each of the TFTs is connected to a corresponding one of the pixel electrodes. The other one of the drain and the source of each of the TFTs is connected to a corresponding one of the data lines, and a gate of each of the TFTs is connected to a corresponding one of the scan lines. The scan driver supplies a scan signal to each of the scan line in a preset scan cycle. The column driver includes D/A converter circuits for converting video data to gray scale signals, a plurality of buffer amplifiers for sequentially amplifying and outputting the gray scale signals in a preset output cycle, and an output switch circuit including a plurality of switches connected to output terminals of the buffer amplifiers and the data lines, respectively. The delay control circuit controls the scan driver so that the preset scan cycle is delayed from the preset output cycle just by a preset delay time. The output switch control circuit controls the output switch circuit to be kept off during the preset delay time. The display controller controls the video data, scan driver, column driver, delay control circuit, and output switch control circuit, respectively.