Display Panel Compensation Memory Layout for Luminance Uniformity
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Solution Overview
Problem
Display devices experience degradation in image quality due to variations in luminance among different color channels, which existing technologies have not adequately addressed.
Innovation Solution
A display device with a memory system that stores compensation signals for different blocks of the display panel, utilizing a driving controller to compensate for input image signals using multiple memories and correction value calculators to output corrected image signals through bilinear interpolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single memory stores all compensation signals for the display panel blocks, then the memory structure is simple, but the reading speed and compensation efficiency are limited due to sequential access constraints
Solution Approach 1:
The patent divides the compensation signal storage into multiple memories (first memory, second memory, third memory, fourth memory), where each memory stores compensation signals for specific blocks of the display panel. This segmentation enables parallel reading of compensation signals from different memories simultaneously, significantly improving the reading speed and compensation efficiency without requiring a single large memory with sequential access
2Reliability
If compensation signals are stored and processed for all blocks simultaneously, then the compensation completeness is high, but the processing time and computational load increase
Solution Approach 1:
The patent pre-calculates and stores compensation signals for all blocks of the display panel in advance within the multiple memories before actual display operation. During display, the driving controller only needs to read the pre-prepared compensation signals from the memories and apply them to the input image signals, rather than calculating compensation in real-time. This preliminary action ensures complete compensation coverage while significantly reducing processing time during actual operation
Data Source
AI summary
A display device is disclosed that includes a display panel, a memory storing compensation signals respectively corresponding to blocks of the display panel, and a driving controller receiving an input image signal, compensating for the input image signal based on the compensation signals, and outputting an output image signal. The driving controller includes first to fourth memories storing the compensation signals from the memory. The compensation signals stored in the memory include first row compensation signals corresponding to blocks disposed at a first row among the blocks and second row compensation signals corresponding to blocks disposed at a second row among the blocks. Some of the first row compensation signals are stored in the first memory, and the others thereof are stored in the second memory. Some of the second row compensation signals are stored in the third memory, and the others thereof are stored in the fourth memory.