Display Substrate Connection-Line Layout for Gray-Scale Uniformity

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Solution Overview

Problem

Existing display technologies face challenges in ensuring uniformity of display under high and low gray-scales without the need for additional pins and wiring space for introducing initial voltages in the peripheral regions of display substrates.

Innovation Solution

The implementation of a display substrate design that includes a first initial signal line connected to a first power line through a signal connection line in the peripheral region, optimizing the layout to avoid the addition of pins and wiring space by integrating the connection lines with the power line, thereby ensuring uniformity of display.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If additional pins and wiring space are used to introduce initial voltages in the peripheral regions, then the uniformity of display under high and low gray-scales is improved, but the device complexity and wiring space increase

Engineering Contradiction:
Improvedisplay uniformityVSAvoidwiring space
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the initial signal line with the power line in the peripheral region, allowing the initial voltage to be introduced through the existing power line infrastructure rather than requiring separate dedicated wiring. This integration reduces the overall wiring space while maintaining the ability to provide uniform initial voltages across the display substrate.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The power line is designed to serve multiple functions: it acts as both the power supply line and the initial voltage introduction line. By making the power line multi-functional, the patent eliminates the need for additional dedicated pins and wiring for initial voltage introduction, thereby reducing device complexity while ensuring display uniformity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional pins and wiring space are used to introduce initial voltages, then the reliability of voltage supply is improved, but the area of peripheral region increases

Engineering Contradiction:
Improvevoltage supplyVSAvoidperipheral region area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the initial voltage introduction function with the existing power line, eliminating the need for separate wiring and pins. This merging approach maintains reliable voltage supply to the light emitting elements while minimizing the expansion of the peripheral region area.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If connection lines are integrated with power line, then the wiring space is reduced, but the difficulty of ensuring signal integrity increases

Engineering Contradiction:
Improvewiring spaceVSAvoidsignal integrity
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies different design considerations to different regions: in the display region, separate signal lines are maintained for signal integrity, while in the peripheral region, the integration of initial signal lines with power lines is implemented. This local differentiation allows wiring space reduction in the periphery without compromising signal integrity in the critical display area.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12520684B2Display substrate including connection line and power line surrounding display area, preparation method thereof, and display device
Publication Date: 2026.01.06 BEIJING BOE TECH DEV CO LTD
  • US12520684B2 patent drawing
  • US12520684B2 patent drawing
  • US12520684B2 patent drawing

AI summary

A display substrate includes a display region and a peripheral region on a periphery of the display region. At least multiple sub-pixels are arranged in the display region. At least one sub-pixel includes a pixel driving circuit arranged on an underlay substrate and a light emitting element connected with the pixel driving circuit. The light emitting element includes an anode, a light emitting layer and a cathode, and the cathode is electrically connected with a first power line. The first power line and a signal connection line are arranged in the peripheral region. A first sub-power line is connected with the first power line through the signal connection line in the peripheral region, and the first sub-power line is arranged in the display region.