Display Contact Structure for High-Aperture Pixel Layouts
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Solution Overview
Problem
In electroluminescent display devices, the interlayer insulating layer between horizontal and vertical lines is vulnerable to short circuits, limiting the thickness of the gate insulating layer and buffer layer, which restricts the aperture ratio and makes it difficult to design high-resolution pixels without using a gate redundancy pattern.
Innovation Solution
The vertical data/power line is placed on the same layer as the light shielding layer, and the horizontal gate line on the same layer as the gate electrode, with the gate insulating layer and buffer layer interposed between them, allowing for increased thickness without affecting capacitor capacity, thus eliminating the need for a gate redundancy pattern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the interlayer insulating layer is used between horizontal and vertical lines, then the structure is simple, but short circuit failures occur due to limited thickness
Solution Approach 1:
The patent divides the insulating structure into multiple segments: buffer layer, gate insulating layer, and interlayer insulating layer. This segmentation allows each layer to perform its specific function optimally, with the buffer and gate insulating layers providing enhanced electrical isolation at critical interfaces, thereby preventing short circuits while maintaining structural organization
Solution Approach 2:
The patent adds a vertical dimension to the insulating structure by stacking multiple insulating layers (buffer layer and gate insulating layer) between the horizontal gate line and vertical data line, rather than relying solely on a single interlayer insulating layer. This multi-layer stacking in the vertical dimension significantly enhances electrical isolation and prevents short circuit failures
2Reliability
If the gate insulating layer and buffer layer thickness are increased to prevent short circuits, then reliability improves, but capacitor capacity is affected
Solution Approach 1:
The patent applies different thickness requirements to different regions: the gate insulating layer and buffer layer are made thicker specifically at the intersection region between gate line and data line to prevent short circuits, while the interlayer insulating layer thickness is optimized for capacitor capacity in other regions. This local differentiation allows simultaneous achievement of high reliability and adequate capacitance
3Reliability
If a gate redundancy pattern is used to repair short circuit failures, then yield improves, but aperture ratio is reduced
Solution Approach 1:
The patent incorporates a buffer layer and enhanced gate insulating layer at the intersection regions before any short circuit failure can occur. This preventive approach provides inherent protection against short circuits, eliminating the need for gate redundancy patterns and thereby maintaining high aperture ratio while ensuring device reliability
4Reliability
If the interlayer insulating layer thickness is increased to prevent short circuits, then reliability improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the total insulating thickness into multiple layers (buffer layer, gate insulating layer, interlayer insulating layer), each with moderate thickness requirements. This segmentation reduces the manufacturing precision burden compared to creating a single thick interlayer insulating layer, as each individual layer can be formed with standard thickness tolerances while achieving the cumulative insulation effect needed to prevent short circuits
Data Source
AI summary
In the contact structure according to an exemplary aspect of the present disclosure and a display device including the same, the pixel may be designed regardless of the size of the contact hole by designing a size (or an area) of the contact hole to be larger than the contact area and applying different structures depending on the characteristics of the lower layer. Therefore, the size of the contact hole is increased so that the halftone mask may be easily applied and the number of masks may be advantageously reduced. Further, a degree of freedom of metal in the pixel design is increased so that the pixel may be designed in a high resolution model and the aperture ratio is increased without having the electrode margin. The contact structure comprises: a lower layer; at least a first insulating layer on the lower layer, the first insulating layer having a predetermined contact hole to expose a part of the lower layer; and an upper layer on the first insulating layer to be in contact with the lower layer through the contact hole, wherein the contact hole has a relatively larger area than a contact area where the upper layer and the lower layer are in contact with each other.