Display Device Contact Hole Design for High Resolution
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Solution Overview
Problem
The manufacturing of high-resolution display devices requires small contact holes, leading to increased production costs due to the need for additional high-resolution light exposure devices.
Innovation Solution
A display device design where first and second transistors are both exposed through a contact hole in the passivation layer, allowing for larger contact holes without the need for additional devices, and including a substrate with gate and data lines, pixel electrodes, and passivation layers with organic and inorganic layers to reduce manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel area is increased to improve resolution, then the resolution increases, but the contact hole size becomes too small to form without additional high-resolution light exposure devices
Solution Approach 1:
The patent repositions the contact hole from the traditional non-pixel area to the pixel area, utilizing the vertical dimension through multiple passivation layers. This allows the contact hole to expose transistors from above rather than requiring lateral positioning in the non-pixel area, enabling larger contact hole dimensions while maintaining high display resolution.
Solution Approach 2:
The patent divides the contact hole formation into multiple stages using a multi-layer passivation structure. The first passivation layer contains the contact hole that exposes both transistors, while the second passivation layer is formed separately. This segmentation allows independent optimization of each layer's function and simplifies the manufacturing process by eliminating the need for additional high-resolution light exposure devices.
2Manufacturing precision
If additional high-resolution light exposure devices are used to form minute contact holes, then the contact hole precision improves, but the production cost increases
Solution Approach 1:
The contact hole in the first passivation layer serves multiple functions: it provides electrical connection for both the first transistor (through connection to first pixel electrode) and the second transistor (through connection to second pixel electrode). This multi-functionality eliminates the need for separate contact holes for each transistor, reducing manufacturing complexity and eliminating the requirement for additional high-resolution light exposure devices.
Solution Approach 2:
The patent merges the contact hole formation process for two separate transistors into a single contact hole structure. By positioning the contact hole to expose both the first and second transistors simultaneously, the manufacturing process is simplified and does not require additional specialized equipment, thereby reducing production costs while maintaining precision.
3Ease of manufacture
If a single contact hole exposes both first and second transistors, then the manufacturing process simplifies and costs reduce, but the transistor exposure precision must be maintained
Solution Approach 1:
The first passivation layer acts as an intermediary structure that precisely positions and exposes both transistors through the contact hole. The second passivation layer serves as another intermediary that is formed after the contact hole is created, providing additional protection and insulation. These intermediary layers enable precise transistor exposure while simplifying the overall manufacturing process by eliminating the need for complex alignment procedures.
Data Source
AI summary
A display device includes a first substrate. A first gate line is disposed on the first substrate. First and second data lines intersect the first gate line. A first transistor is connected to the first gate line and the first data line. A second transistor is connected to the first gate line and the second data line. A first passivation layer is disposed on the first and second transistors, the first passivation layer including a first contact hole. A first pixel electrode is disposed on the first passivation layer, the first pixel electrode being connected to the first transistor through the first contact hole. A second pixel electrode is disposed on the first passivation layer, the second pixel electrode being connected to the second transistor through the first contact hole. The first and second transistors are both exposed through the first contact hole.