Display Control Abnormality Testing Synchronization

The patent combines the test data generation and image processing functions into a single control test apparatus. The controller integrates both the buffer storage function for test data and the image reception function, eliminating the need for separate camera apparatuses and their calibration systems. This merging maintains timing synchronization while reducing overall system complexity.

The control test apparatus is designed with multi-functionality, serving both as a test data generator and an image receiver with built-in buffer storage. This universal apparatus can conduct complex tests during development phases without requiring additional specialized equipment, thereby reducing device complexity while maintaining precise timing control.

The controller performs preliminary buffering of test data before image processing occurs. By pre-storing test data in the buffer with timing information, the system prepares the data in advance, allowing subsequent determination to be performed accurately without timing mismatch. This preliminary action maintains testing speed while preventing false abnormality determinations.

The controller implements feedback control by continuously monitoring the timing relationship between received images and buffered test data. When a timing mismatch is detected, the controller adjusts the determination timing accordingly, providing feedback that prevents excessive abnormality determination while maintaining efficient testing throughput.