Display Control Module Adjusts Bus Command Depth
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Solution Overview
Problem
Current multimedia display systems face challenges in ensuring real-time performance and low power consumption due to increased latency and power consumption issues when using SOC chips with AXI buses, particularly in mobile devices, where existing solutions either increase chip area and power consumption or affect other real-time modules' efficiency.
Innovation Solution
A display control method that adjusts the depth of outstanding bus commands based on the status of the display buffer, comparing it with a preset warning value to optimize bus operations and maintain display bandwidth without affecting other commands' priorities, thereby reducing latency and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a buffer is added to reduce latency, then real-time display performance is improved, but chip area and power consumption increase
Solution Approach 1:
The patent merges the display buffer function with the existing DDR memory by utilizing unused bandwidth periods. Instead of adding a separate buffer component, the system combines display data storage with general-purpose memory operations, eliminating the need for dedicated buffer hardware and reducing power consumption while maintaining real-time display performance.
Solution Approach 2:
The DDR memory is designed to serve multiple functions: it acts as both general system memory and display buffer simultaneously. By making the DDR memory multi-functional, the patent avoids adding separate components and reduces overall system power consumption while ensuring real-time display requirements are met through optimized bandwidth allocation.
2Loss of time
If display control module priority is raised in AXI bus, then display real-timeness is improved, but DDR bandwidth utilization efficiency decreases
Solution Approach 1:
The patent implements periodic bandwidth allocation where the display control module is granted priority access during specific periods when DDR bandwidth is underutilized. This periodic action allows the system to maintain high DDR bandwidth utilization overall while ensuring display real-timeness when needed, avoiding continuous high-priority occupation that would degrade overall system productivity.
Solution Approach 2:
The AXI bus priority for the display control module is made dynamic rather than static. The system adjusts priority levels based on real-time DDR bandwidth availability and display requirements, allowing optimal balance between display real-timeness and overall DDR bandwidth utilization efficiency under different operating conditions.
3Productivity
If bus frequency and data bit width are increased, then display bandwidth is improved, but power consumption increases
Solution Approach 1:
Instead of permanently increasing bus frequency and data bit width, the patent dynamically adjusts these parameters based on actual display bandwidth requirements. The system monitors display workload and modifies bus operating parameters accordingly, achieving high display bandwidth when needed while consuming less power during normal operation, thus resolving the contradiction between productivity and energy consumption.
Data Source
AI summary
The present invention provides a display control method and system, and a display device. The method includes acquiring a status value of a display buffer; comparing the status value of the display buffer with a preset warning value of the display buffer; and adjusting a value of a depth of outstanding bus commands according to a comparison result. In the embodiments of the present invention, a status value of the display buffer is compared with a preset warning value of the display buffer, where the status value of the display buffer reflects a change to a current load; it may be determined whether a status value of the display buffer corresponding to the current load is normal according to a comparison result; and a value of a depth of outstanding bus commands is adjusted accordingly, effectively resolve a data real-timeness issue, and ensure that an entire system efficiently runs.