Display Control Device Frame Rate Synchronization
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Solution Overview
Problem
Display devices face challenges in smoothly displaying frames due to differences in input and output frame rates and resolutions, leading to potential buffer insufficiency or repetitive frame output, resulting in erroneous or unsmooth frames.
Innovation Solution
A display control device that automatically adjusts the output frame rate by detecting time differences between input and output field reference signals, using a frequency adjusting signal generator and clock generator to synchronize frame rates, ensuring the time difference is reduced below a predetermined threshold.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the output frame rate is increased to improve display smoothness, then frame display quality is improved, but frame synchronization accuracy deteriorates due to time difference accumulation
Solution Approach 1:
The patent implements a feedback mechanism where the detector continuously monitors the time difference between input and output field reference signals, and the clock generator adjusts the output frame rate based on this feedback to maintain synchronization within the threshold
Solution Approach 2:
The patent dynamically adjusts the output frame rate by modifying the clock frequency based on the detected time difference, allowing the system to adapt between maintaining smooth display and ensuring synchronization accuracy depending on the current state
2Reliability
If the clock frequency is adjusted frequently to reduce time difference, then synchronization accuracy is improved, but system stability deteriorates due to excessive frequency changes
Solution Approach 1:
The patent applies partial adjustment by only modifying the clock frequency when the time difference exceeds the predetermined threshold, avoiding unnecessary frequency changes and maintaining system stability while still achieving synchronization when needed
3Measurement precision
If the time difference threshold is set low to ensure precision, then synchronization accuracy is improved, but the complexity of control increases
Solution Approach 1:
The patent changes the parameter of time difference threshold to a predetermined value that balances precision and complexity, allowing the system to maintain adequate synchronization accuracy without requiring overly complex control mechanisms
Data Source
AI summary
A display control device includes a detector, a frequency adjusting signal generator, a clock generator and an output timing generator. The detector compares an input field reference signal with an output field reference signal to determine a time difference signal. The frequency adjusting signal generator outputs a frequency adjusting signal. The clock generator outputs a clock according to the frequency adjusting signal. The output timing generator generates an output field synchronization signal according to the clock. The clock generator adjusts the frequency of the clock according to the frequency adjusting signal.