Display Controller Dynamic Buffer Allocation for Latency Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display controllers face challenges with limited buffer memory capacity and increased system complexity due to high-speed data transfer requirements, leading to latency issues and digital artifacts during display refresh.
Innovation Solution
A display controller architecture that dynamically reconfigures buffer memory by allowing activated layers to borrow from inactive layers, effectively doubling the memory capacity without additional hardware, and utilizing a buffer controller to manage data transfer and layer activation, thereby reducing sensitivity to data rate changes and bandwidth limitations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If buffers are utilized to buffer data between memory and processing unit, then latency requirement is reduced, but buffer memory capacity is limited and system complexity increases
Solution Approach 1:
The patent combines multiple fixed-capacity buffers into a unified buffer pool that can be dynamically allocated. Instead of having separate dedicated buffers for different layers, the system merges them into a shared resource that can be flexibly assigned based on current display needs, thereby increasing effective buffer capacity without adding hardware.
Solution Approach 2:
The patent implements dynamic buffer allocation where buffer assignments change based on real-time layer activation status. When layers are deactivated, their buffer resources are released and made available for other active layers. This dynamic reconfiguration allows the system to adapt buffer capacity to current demands, effectively increasing available buffer memory without additional hardware.
2Quantity of substance
If variable sized FIFO buffer is used with external RAM, then buffer capacity is increased, but system complexity and access time increase
Solution Approach 1:
The patent makes existing fixed-capacity buffers multi-functional by allowing them to serve different layers at different times. The same physical buffer memory can be allocated to different layers based on activation status, making the buffer system universal rather than dedicated. This eliminates the need for complex variable-sized buffers while maintaining increased effective capacity.
Solution Approach 2:
The buffer management system automatically reallocates buffer resources when layers are activated or deactivated without requiring external controller intervention. The display controller itself manages buffer allocation internally, making the system self-sufficient and avoiding the need for additional controller units that would increase complexity.
3Ease of operation
If multiple fixed capacity buffers are associated to respective layers, then buffer management is simplified, but memory capacity is limited when layers are activated and deactivated
Solution Approach 1:
The patent implements a buffer recovery mechanism where buffer resources previously allocated to deactivated layers are discarded from their original assignment and recovered into the buffer pool for reallocation. This allows the system to reuse existing buffer capacity rather than requiring additional memory, while maintaining simplified fixed-capacity buffer structures.
Data Source
AI summary
A display controller comprises a plurality of channels for fetching data from a memory, a plurality of buffers coupled to the channels for receiving the fetched data from the channels, a buffer controller for controlling the buffers and the channels, and a processing unit coupled to the buffers, the display and buffer controller for receiving the data from the buffers, outputting a control signal to the display based on the received data, and controlling the buffer controller, respectively. Each buffer has a respective fixed memory capacity for storing the fetched data. The processing unit activates layers in the output image for displaying an output image on the display. The channels correspond to associated layers. The buffer controller adds to the respective fixed memory capacity of a particular buffer associated to an activated layer, one further fixed memory capacity of at least one further buffer associated to an inactive layer.