Display Controller Memory Request Aggregation for Power Savings
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Solution Overview
Problem
Semiconductor chips face performance bottlenecks and increased power consumption due to repeated overhead processing of memory access requests from multiple functional units, preventing the memory subsystem from entering a low-power mode, especially when display screens are idle.
Innovation Solution
Implementing a display controller with request aggregation logic that aggregates memory requests and transitions to a low-power mode by detecting idle states, allowing bursts of memory traffic during short periods to maximize power savings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory requests are processed individually from multiple functional units, then each request receives timely processing, but overhead processing repeats and creates a bottleneck reducing subsystem performance
Solution Approach 1:
The patent merges multiple memory requests from different functional units into a single aggregated request. The memory controller combines requests that access the same memory bank, eliminating redundant overhead processing while maintaining data retrieval efficiency. This directly reduces power consumption from repeated overhead operations and improves subsystem performance.
2Use of energy by moving object
If the memory subsystem continuously processes display refresh requests at 60 frames-per-second, then the display screen updates smoothly, but the memory subsystem cannot enter low-power mode consuming appreciable power
Solution Approach 1:
The patent implements periodic action by allowing the memory subsystem to operate continuously during active display refresh and then transition to low-power mode during idle periods. The system detects when no display refresh requests are pending and enters a sleep state, creating a periodic cycle between active and low-power states. This dramatically reduces average power consumption while maintaining display performance when needed.
3Ease of operation
If multiple functional units send memory requests independently, then each unit accesses memory when needed, but the repeated overhead processing creates a bottleneck
Solution Approach 1:
The patent introduces an intermediary aggregation layer between functional units and the memory controller. This intermediary collects requests from multiple functional units, aggregates them by memory bank, and submits consolidated requests. This maintains the independence of functional units while eliminating the performance bottleneck through centralized request optimization.
Data Source
AI summary
Systems, apparatuses, and methods for aggregating memory requests with opportunism in a display pipeline. Memory requests are aggregated for each requestor of a plurality of requestors in the display pipeline. When the number of memory requests for a given requestor reaches a corresponding threshold, memory requests may be issued for the given requestor. In response to determining the given requestor has reached its threshold, other requestors may issue memory requests even if they have not yet aggregated enough memory requests to reach their corresponding thresholds.


