Display Controller Ping-Pong Buffer Parallel Data Transfer

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current display controller systems for electrophoretic displays face delays in processing image data, causing slowdowns as the central processing unit must wait for image updates to complete before receiving additional data, leading to inefficient system performance.

Innovation Solution

A display controller system with a memory controller and two buffers (ping-pong buffers) that transfers data from one full buffer to an image memory, allowing continuous image updating and new data writing without interfering with image updating, using a look-up table to determine driving waveforms for pixels and transferring data within a line updating time period.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CPU waits for image update completion before transferring new image data, then the display controller can process image data accurately, but the system processing speed decreases

Engineering Contradiction:
Improveimage data processing accuracyVSAvoidsystem processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the image data transfer and processing into separate segments: one path handles image update data transfer from CPU to image memory, while another path handles display controller processing of current image data. This segmentation allows parallel execution, improving system productivity without compromising processing accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary buffer memory structure that temporarily stores image data during transfer. This buffer acts as a mediator between the CPU data transfer operations and the display controller processing operations, enabling smooth data flow without requiring the CPU to wait for processing completion.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If data is transferred from main memory to image memory during image updating, then system throughput increases, but data transfer accuracy may be compromised due to interference

Engineering Contradiction:
Improvesystem throughputVSAvoiddata transfer accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements preliminary action by pre-allocating buffer memory regions and establishing dedicated data transfer pathways before image updating begins. This preparation ensures that data transfer operations can proceed without interfering with the image updating process, maintaining both throughput and accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent adds a temporal dimension to data transfer by staggering transfer operations to occur during specific time windows within the image updating cycle. This dimensional approach allows multiple operations to coexist by assigning them different time slots, preventing interference while maintaining high system throughput.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10115354B2Display controller system
Publication Date: 2018.10.30 E INK CORP
  • US10115354B2 patent drawing
  • US10115354B2 patent drawing
  • US10115354B2 patent drawing

AI summary

A display controller system with a memory controller and buffers is described. The system enables transferring data from the main memory of the CPU to the image memory without interfering with the image updating. As a result, the present invention may allow continuously updating the image display and continuously writing new image data from CPU to the image memory, which improves overall system performance.