Display Controller Memory Read Subsystem Prefetching Page Access Data
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Display controllers in data processing systems face challenges in efficiently accessing and processing input surfaces for display due to latency issues caused by non-contiguous memory page allocation and the need for rapid address translation, leading to potential under-run situations where insufficient pixel data is available for display.
Innovation Solution
A memory read subsystem that pre-loads memory page access data, such as address translation data, into a cache based on information about the input surfaces required for processing, allowing for efficient and timely retrieval of data by selecting only the necessary memory pages and reducing unnecessary memory traffic and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the display controller reads input surface data from non-contiguous memory pages, then the data can be stored efficiently in memory, but the access latency increases due to the need for address translation
Solution Approach 1:
The patent pre-loads memory page access data (such as translation lookaside buffer entries) into a cache before the actual input surface data is needed. This preliminary action ensures that when the display controller needs to access non-contiguous memory pages, the address translation data is already available in the cache, eliminating the latency penalty of real-time address translation while maintaining efficient non-contiguous memory storage
2Speed
If the display controller caches all memory page access data, then address translation is rapid, but the cache size required becomes excessively large
Solution Approach 1:
The patent extracts and caches only the specific memory page access data that is actually needed for the current input surface processing task. Instead of caching all possible page table entries, the system identifies and pre-loads only the page access data corresponding to the memory pages that will be accessed during the current frame processing, thereby maintaining fast address translation while keeping the cache size minimal
Solution Approach 2:
The patent applies local quality by making the cache content specific to the current processing context. The cache is populated with memory page access data tailored to the particular input surface and its associated memory pages, rather than using a generic large cache. This localized approach ensures fast translation for the current task without requiring excessive cache capacity
3Reliability
If the system pre-loads all memory pages for input surfaces, then data availability is ensured, but power consumption and memory traffic increase
Solution Approach 1:
The patent applies partial action by pre-loading only the specific memory pages that contain data actually required for the current input surface processing, rather than pre-loading all memory pages. The system identifies the exact memory pages needed based on the input surface parameters and pre-loads only those pages into the cache, ensuring data availability while minimizing unnecessary memory traffic and power consumption from loading and processing irrelevant data
Data Source
AI summary
A display controller for a data processing system includes a memory read sub-system operable to read data of input surfaces to be used as input layers to be processed by the display controller.The memory read sub-system is operable to request in advance the loading of memory address translation data into a memory address translation data cache for memory pages storing data relating to an input surface. The memory read sub-system selects the memory pages that it requests the advance loading of address translation data for based on information relating to the data for the input surface that will be required by the display controller to generate the output surface, such as the vertical and horizontal size of the input layer that the input surface will be used for, an indication of any flipping or rotation of the input surface, etc.