Display Controller SSC Clock Segmentation for Visual Artifact Suppression

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Solution Overview

Problem

Existing display controllers using spread spectrum clocking (SSC) for clocking operations can cause visual artifacts due to modulation of horizontal and vertical cycles, while also contributing to electromagnetic interference (EMI) emissions, which are not effectively mitigated by traditional metal casings.

Innovation Solution

Implementing a display controller that uses two pixel clocks, one modulated with SSC for video data transfer and the other unmodulated for horizontal and vertical cycle counters, preventing modulation of these cycles and thereby reducing visual artifacts and EMI emissions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If spread spectrum clocking is used to reduce EMI emissions, then electromagnetic interference is reduced, but visual artifacts appear due to modulation of horizontal and vertical cycles

Engineering Contradiction:
ImproveEMI emissionsVSAvoidvisual artifact suppression
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The display controller is divided into two separate clocking domains: one domain uses SSC-modulated clock for video data transfer operations, while the other domain uses unmodulated clock for horizontal and vertical cycle counters. This segmentation allows EMI reduction in data transfer while maintaining stable timing cycles to prevent visual artifacts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different clocking strategies are applied to different functional blocks within the display controller. The video data transfer portion receives SSC-modulated clock signals to reduce EMI, while the timing control portion (horizontal and vertical counters) receives clean unmodulated clock signals to maintain constant cycle lengths and prevent visual artifacts.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If spread spectrum clocking modulates the pixel clock to reduce EMI, then electromagnetic interference is suppressed, but line brightness variation occurs causing visual artifacts

Engineering Contradiction:
ImproveRF emission suppressionVSAvoidline brightness uniformity
Core Design Contradiction:
Object-generated harmful factorsVSIllumination intensity

Solution Approach 1:

The pixel clock signal is segmented into two functional uses: an SSC-modulated version for video data transfer to suppress RF emissions, and an unmodulated version for timing control to ensure constant horizontal cycle duration and maintain uniform line brightness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The harmful EMI characteristics are extracted and applied only to the video data transfer clock, while the timing control clock retains the original clean signal properties. This extraction allows EMI suppression in the data path without affecting the timing stability required for uniform display output.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10699677B2Display controller to prevent visual artifacts with spread spectrum clocking
Publication Date: 2020.06.30 INTEL CORP
  • US10699677B2 patent drawing
  • US10699677B2 patent drawing
  • US10699677B2 patent drawing

AI summary

A display controller and method for performing the same operations are described. In on embodiment, the display controller comprises a spread spectrum clock (SSC) modulator having a first input coupled to receive a non-SSC modulated clock and operable to generate a SSC modulated clock in response to the non-SSC modulated clock, a video data transfer portion coupled to receive the SSC modulated clock and operable to output data for display in response to the SSC modulated clock, and a second portion coupled to receive the non-SSC modulated clock.