Display Controller Synchronization Signal Adjustment for Tearing and Flicker

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Solution Overview

Problem

As display resolution increases in portable devices, power consumption and flicker issues arise due to inadequate synchronization signal management, leading to tearing and flickering on screens.

Innovation Solution

A display controller with an adjusting circuit that adjusts the delay and pulse width of synchronization signals, and a transmission timing control circuit to synchronize display data transmission, using difference information to optimize signal timing and prevent tearing and flickering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If display resolution is increased, then image quality is improved, but power consumption increases and flicker occurs

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent adjusts timing parameters (delay time and pulse width) of the synchronization signal to optimize display performance. By dynamically changing these parameters, the system achieves stable high-resolution display while reducing power consumption and eliminating flicker effects.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If display resolution is increased, then image quality is improved, but screen flicker occurs

Engineering Contradiction:
Improvedisplay resolutionVSAvoidscreen flicker
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent modifies the synchronization signal parameters (delay time and pulse width) to match the specific requirements of high-resolution displays. This parameter adjustment ensures stable image output at high resolutions while eliminating flicker by optimizing the timing characteristics of the synchronization signal.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If synchronization signal timing is not adjusted, then device complexity is reduced, but tearing and flicker occur on screen

Engineering Contradiction:
Improvesynchronization controlVSAvoidscreen tearing and flicker
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary adjustment to the synchronization signal by pre-calculating and applying the appropriate delay time and pulse width values before display output. This advance adjustment prevents tearing and flicker from occurring, ensuring smooth high-resolution display without requiring complex real-time correction mechanisms.

Inventive Principle:
Principle #10Preliminary action

4Object-affected harmful factors

If synchronization signal is adjusted with precise timing control, then screen tearing and flicker are eliminated, but device complexity increases

Engineering Contradiction:
Improvescreen stabilityVSAvoidtiming control circuit
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent divides the synchronization signal adjustment into two independent parameters: delay time adjustment and pulse width adjustment. This segmentation allows each parameter to be optimized separately using simple circuitry, achieving stable tear-free and flicker-free display without requiring a complex integrated timing control system.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9472133B2Devices and method of adjusting synchronization signal preventing tearing and flicker
Publication Date: 2016.10.18 SAMSUNG ELECTRONICS CO LTD
  • US9472133B2 patent drawing
  • US9472133B2 patent drawing
  • US9472133B2 patent drawing

AI summary

A display controller includes a synchronization signal adjusting circuit, which adjusts at least one of the delay and the pulse width of a synchronization signal generated in a display driver and outputs an adjusted synchronization signal, and a transmission timing control circuit configured to control the transmission timing of display data, which will be transmitted to the display driver, in response to the adjusted synchronization signal.