Display Driving Controller Error Detection for Clock Synchronization
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Solution Overview
Problem
Existing display devices face issues with synchronization errors between the host processor and the driving controller, leading to display artifacts and reduced reliability due to clock divergence, which are not adequately addressed by current technologies.
Innovation Solution
Incorporation of an error detector in the driving controller to identify synchronization fail errors and synchronization loss errors, utilizing counters and comparators to generate error flag signals, allowing the host processor to initialize the driving controller and maintain synchronization through continuous signal provision, thereby preventing clock skew and flicker.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the driving controller continuously monitors synchronization signals to detect errors, then display reliability is improved, but device complexity increases due to additional error detector components
Solution Approach 1:
The error detector proactively monitors synchronization signals and detects errors before they cause display artifacts or clock divergence. By performing preliminary detection of sync errors, the system can initialize the driving controller in advance, preventing reliability issues before they manifest in display output.
Solution Approach 2:
The error detector acts as an intermediary component between the synchronization signal input and the driving controller initialization logic. It mediates the synchronization process by detecting errors and triggering appropriate responses, thereby improving reliability without requiring fundamental changes to the existing controller architecture.
2Measurement precision
If the driving controller is initialized frequently in response to synchronization errors, then synchronization accuracy is improved, but productivity decreases due to repeated initialization overhead
Solution Approach 1:
The system implements feedback through the error detector that continuously monitors synchronization signals and provides information about sync errors to the driving controller. This feedback mechanism enables accurate detection of synchronization issues and triggers initialization only when necessary, maintaining sync accuracy while avoiding unnecessary initialization cycles that would reduce productivity.
Solution Approach 2:
Rather than continuously initializing the driving controller or monitoring every signal transition, the error detector applies partial monitoring by detecting specific error conditions (initial sync fail and sync loss) and triggering initialization only when these partial error conditions are met. This selective approach maintains synchronization accuracy without the excessive overhead of continuous full initialization.
3Measurement precision
If the error detector uses multiple counters and comparators to distinguish between different synchronization errors, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The error detection function is segmented into distinct components: a first counter for detecting initial synchronization failures, a second counter for detecting synchronization loss, and comparators for each counter. This segmentation allows precise detection of different error types while organizing the complexity into manageable, modular units that can be independently optimized.
Solution Approach 2:
Different parts of the error detector are assigned specialized functions with appropriate complexity levels. The first counter and comparator are optimized for detecting initial sync failures, while the second counter and comparator are optimized for detecting sync loss. This local quality approach ensures high measurement precision for each error type without requiring the entire system to be uniformly complex.
Data Source
AI summary
An electronic device including: a host processor to generate a first clock signal and to output frame data and a synchronization signal; a driving controller to receive the synchronization signal and the frame data from the host processor and to generate a control signal based on a second clock signal; and a display panel, wherein the driving controller synchronizes the second clock signal with the first clock signal based on the synchronization signal, wherein the driving controller includes an error detector to detect an error of the synchronization signal, and wherein the error detector outputs a first signal when the error is an initial synchronization fail error and outputs a second signal different from the first signal when the error is a synchronization loss error.