Display DAC Buffer Circuit for Compact, Low-Distortion Output
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Solution Overview
Problem
Conventional digital-to-analog converting circuits in high-resolution image displaying systems, such as TFT-LCDs, face challenges in reducing circuit layout area due to increased bit numbers, and capacitor-type converters suffer from voltage distribution distortions caused by coupling effects, leading to incorrect voltage storage and output distortion.
Innovation Solution
A digital-to-analog converting circuit design incorporating a capacitor type digital-to-analog converter, an analogue buffer, and a switch configuration that includes a first, second, and third switch, allowing for precise voltage generation and output transmission, with the analogue buffer using transistors and capacitors to manage voltage ranges and reduce charge time variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a resistor type digital-to-analog converting circuit is used to handle high-bit digital signals, then the conversion accuracy is improved, but the circuit layout area is greatly expanded
Solution Approach 1:
The patent divides the high-bit digital-to-analog conversion into multiple lower-bit conversion stages. For example, a 10-bit conversion is segmented into a 5-bit resistor type converter and a 5-bit capacitor type converter, or into a 3-bit resistor type converter and a 7-bit capacitor type converter. This segmentation allows the system to achieve high conversion accuracy while significantly reducing the circuit layout area by using smaller capacitors in series configurations.
2Area of stationary object
If a capacitor type digital-to-analog converting circuit is used to reduce circuit layout area, then the area is reduced, but output voltage distortion occurs due to coupling effects
Solution Approach 1:
The patent introduces an analogue buffer as an intermediary component between the capacitor type digital-to-analog converter and the output. This buffer isolates the coupling capacitor from the output node, preventing the coupling effect from causing voltage distribution distortion. The buffer compensates for the output voltage and eliminates the distortion that would otherwise occur, thereby maintaining output voltage accuracy while allowing the use of compact capacitor-based conversion circuits.
3Adaptability or versatility
If the analogue buffer compensates for output voltage variations, then the input voltage range is increased, but the coupling capacitor influences voltage distribution causing incorrect voltage storage
Solution Approach 1:
The analogue buffer serves as a mediator that decouples the compensation function from the voltage storage function. During the compensation period, the buffer actively compensates for voltage variations and extends the input voltage range, while simultaneously preventing the coupling capacitor from influencing the voltage distribution in the storage capacitor. This is achieved through the buffer's high input impedance and voltage buffering capability, which isolates the storage capacitor from the coupling effects during compensation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces circuit layout area and minimizes output voltage distortion, achieving accurate analog signal conversion with reduced errors across various bit lengths, as demonstrated by waveform and curve diagrams showing minimal error values compared to ideal conversions.
Implementation Method 1
a capacitor type digital-to-analog converter, and generates a first analog signal according to the digital signal
Implementation Method 2
The analogue buffer comprises a first transistor coupled between a predetermined voltage and the third node having a first gate coupled to the second node, and a second transistor coupled between a ground and the third node having a second gate coupled to the bias voltage
Data Source
AI summary
A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.