Display DAC Circuit Switching to Cut Parasitic Delay

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Solution Overview

Problem

The increasing load capacity and shorter driving period of data lines in high-resolution display panels require high-speed digital-to-analog conversion to maintain charge rates and prevent image quality issues like uneven brightness, but existing amplification circuits face delays due to parasitic capacitance and varying change speeds across gradation levels.

Innovation Solution

A digital-to-analog conversion circuit with an amplification circuit that switches between first and second selection states, reducing parasitic capacitance by selectively supplying reference voltages or output voltages to input terminals, and using a selector to manage input terminals based on control signals, thereby unifying change speeds across gradation levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the number of reference voltages is increased to increase the number of brightness gradations, then the display quality is improved, but the chip size and manufacturing cost increase

Engineering Contradiction:
Improvebrightness gradation precisionVSAvoidchip size
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent changes the operational parameters of the amplification circuit by switching between different selection states (first and second states) to control which input terminals receive reference voltages versus output voltages. This parameter switching allows the circuit to achieve high-precision brightness gradations without permanently increasing the number of reference voltage lines, thereby avoiding chip size expansion while maintaining manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic switching capability to the amplification circuit through the selector circuit, which dynamically reconfigures the connections between input terminals and voltage sources based on operational requirements. This dynamic reconfiguration allows the same hardware to serve multiple functions: achieving high precision when needed while minimizing resource usage during normal operation, thus resolving the contradiction between precision and chip size

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If the number of reference voltages is increased to increase the number of brightness gradations, then the display quality is improved, but the manufacturing cost increases

Engineering Contradiction:
Improvebrightness gradation precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent makes the amplification circuit multi-functional by enabling it to operate in different selection states. The same input terminals and amplification circuitry serve dual purposes: they can receive reference voltages for high-precision gradation control or output voltages for standard operation. This universality eliminates the need for separate hardware configurations for different precision levels, thereby reducing manufacturing cost while maintaining the capability for high-precision display

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If the amplification circuit processes multiple reference voltages simultaneously, then the conversion precision is improved, but the processing time increases due to parasitic capacitance

Engineering Contradiction:
Improvevoltage conversion precisionVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements periodic switching between different selection states in the amplification circuit. Instead of continuously processing all reference voltages simultaneously, the circuit periodically switches between processing modes, allowing capacitive elements to discharge and reset between cycles. This periodic action reduces the accumulation of parasitic capacitance effects, thereby reducing processing time delays while maintaining conversion precision through the sequential processing of voltage signals

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent prepares the amplification circuit by pre-charging or pre-discharging capacitive elements before the actual voltage conversion process. The selector circuit is configured in advance to establish appropriate connection states, ensuring that parasitic capacitance is minimized before critical conversion operations. This preliminary preparation action prevents time delays during the actual processing, maintaining both precision and speed

Inventive Principle:
Principle #10Preliminary action

4Measurement precision

If the amplification circuit uses weighted averaging of multiple input voltages, then the interpolation accuracy is improved, but the circuit complexity increases

Engineering Contradiction:
Improveinterpolation accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple input terminals and the selector circuit into a unified amplification circuit structure. By combining the voltage selection, switching, and weighted averaging functions into a single integrated circuit block, the patent reduces overall circuit complexity while maintaining interpolation accuracy. The merged structure allows the circuit to perform complex weighted averaging operations without requiring separate discrete components for each function

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11670216B2Digital-to-analog conversion circuit, data driver, and display device
Publication Date: 2023.06.06 LAPIS SEMICON CO LTD
  • US11670216B2 patent drawing
  • US11670216B2 patent drawing
  • US11670216B2 patent drawing

AI summary

A digital-to-analog conversion circuit, a data driver including the same, and a display device are provided. The circuit includes: a reference voltage generation part, generating a reference voltage group having different voltage values; a decoder, selecting and outputting multiple reference voltages with overlapping from the reference voltage group based on the digital data signal; an amplification circuit, where m (m being an integer of 1 or more and less than x) of first to xth input terminals respectively receive m of multiple reference voltages, and, as an output voltage, a voltage amplified by averaging the voltages respectively received by the first to xth input terminals with predetermined weighting ratios is output; and a selector, which, in a first selection state, supplies the output voltage to (x-m) input terminals among the first to xth input terminals, and in a second selection state, supplies the reference voltages to the (x-m) input terminals.