Display Data Processing With Clock Retraining After Lock-Fail

The patent applies preliminary action by transmitting a clock training pattern before the actual image data to establish and synchronize the clock signal in advance. This preliminary clock training ensures that the receiver is properly synchronized before high-speed data transmission begins, preventing signal distortion caused by timing mismatches. The clock training pattern is sent at a controlled speed to establish reliable timing relationships before full-speed operation.

The patent implements feedback by continuously monitoring the lock status during clock training and using this information to determine whether to proceed with high-speed communication or retransmit the clock training pattern. The lock status signal provides real-time feedback on whether the clock synchronization is successful, allowing the system to adapt its behavior accordingly - proceeding to data transmission when locked successfully, or retraining when lock-fail occurs, thus optimizing the balance between reliability and time.

The patent applies dynamics by implementing variable communication speed based on the type of data being transmitted. Configuration data is transmitted at low-speed communication mode to ensure reliable reception and proper setup, while image data is transmitted at high-speed communication mode once the clock is trained and synchronization is established. This dynamic speed adjustment optimizes both reliability for configuration and speed for image data transmission.