Display Data Driver Buffer Voltage Segmentation

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Solution Overview

Problem

Digital driving methods in display devices consume more power due to frequent charging and discharging operations of data loads, which is exacerbated by the resistance and parasitic capacitance of data lines, leading to increased power consumption compared to analog methods.

Innovation Solution

The implementation of a data driver with data output unit buffers that sequentially output multiple voltage levels, including high, low, and intermediate voltages, synchronized with scan signals, using p-channel and n-channel field effect transistors to reduce power consumption by optimizing the charging and discharging of data loads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If digital driving method is used to express grayscale as period of data voltage application, then mura is reduced due to transistor characteristic deviation, but power consumption increases due to frequent charging and discharging of data loads

Engineering Contradiction:
Improveimage quality uniformityVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent segments the data voltage output into multiple intermediate voltage levels between high and low states. Instead of directly switching between high and low voltages, the data driver outputs a sequence of intermediate voltages (e.g., first intermediate voltage, second intermediate voltage, third intermediate voltage) during the data holding period. This segmentation reduces the charging and discharging current spikes that occur with direct high-low switching, thereby reducing power consumption while maintaining the digital driving method's advantage of eliminating mura.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic action by sequentially outputting multiple intermediate voltage levels during the data holding period. The data driver outputs voltages in a time-sequential manner (first intermediate voltage for a first period, second intermediate voltage for a second period, third intermediate voltage for a third period), creating a periodic voltage application pattern. This periodic approach allows the data load to charge and discharge gradually through intermediate states rather than through abrupt transitions, significantly reducing the power consumed during charging and discharging operations.

Inventive Principle:
Principle #19Periodic action

2Ease of operation

If data voltage is applied with constant level to pixels, then simple driving is achieved, but power consumption increases due to continuous charging and discharging of data loads

Engineering Contradiction:
Improvedriving simplicityVSAvoidenergy for charging and discharging
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent applies dynamics by making the data voltage level time-dependent rather than constant. During the data holding period, the data driver dynamically transitions through multiple intermediate voltage levels (first, second, and third intermediate voltages) in sequence. This dynamic voltage application allows the system to optimize the charging and discharging process at different time intervals, reducing the energy loss associated with maintaining a constant voltage level while keeping the driving mechanism relatively simple.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9378683B2Display device and driving method thereof
Publication Date: 2016.06.28 SAMSUNG DISPLAY CO LTD
  • US9378683B2 patent drawing
  • US9378683B2 patent drawing
  • US9378683B2 patent drawing

AI summary

A display device is disclosed. In one aspect, the display device includes a display panel including a plurality of pixels, and a data driver including a plurality of data output unit buffers electrically connected to a plurality of data lines electrically connected to the pixels. Each of the data output unit buffers includes an output terminal, a first transistor for applying a high level data voltage to the output terminal, and a second transistor for applying a low level data voltage to the output terminal. Each of the data output unit buffers also includes a first switch electrically connecting the first and second transistors to the output terminal, and a second switch electrically connecting a ground voltage to the output terminal.