Display Data Driver Random Timing EMI Reduction
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Solution Overview
Problem
High-resolution display apparatuses face limitations in electromagnetic interference (EMI) reduction due to fixed timing of data voltage output to horizontal lines, which restricts the effectiveness of spread spectrum clock generation (SSCG) as data transfer speeds increase.
Innovation Solution
A display apparatus that randomly changes the output timing of data voltage for each gate line using a controller and data driver, which generates a final source output enable signal to vary the timing, thereby preventing constant EMI occurrence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If spread spectrum clock generation (SSCG) is applied to reduce EMI, then EMI reduction effect is achieved, but the effectiveness is limited as data transfer speed increases in high-resolution displays
Solution Approach 1:
The patent applies dynamics by making the output timing of data voltages variable rather than fixed. A randomization signal is generated to dynamically adjust the output timing of data voltages to different gate lines, creating temporal dispersion that enhances EMI reduction effectiveness even at high data transfer speeds required for high-resolution displays.
2Measurement precision
If constant timing is used for data voltage output to horizontal lines, then timing precision is maintained, but EMI reduction effect decreases
Solution Approach 1:
The patent changes the timing parameter dynamically by introducing randomization. The output timing of data voltages is adjusted based on a randomization signal, varying the timing offset for different gate lines. This parameter change disperses the periodicity of digital signals, significantly reducing EMI while preserving sufficient timing precision for proper display operation.
3Productivity
If data transfer speed is increased for high resolution, then display resolution is improved, but limitation in SSCG applicability arises
Solution Approach 1:
The patent makes the clock signal dynamic through randomization. By varying the output timing of data voltages using a randomization signal, the system maintains SSCG effectiveness at high data transfer speeds required for high-resolution displays, overcoming the limitation of conventional fixed-timing SSCG implementations.
Data Source
AI summary
A display apparatus includes a display panel including a gate line and a data line, a controller generating a source output enable signal determining an output timing of a data voltage output to the data line, and a data driver including a signal changer, generating a final source output enable signal by using the source output enable signal, and randomly changing the output timing of the data voltage for each gate line by using the final source output enable signal.