Display Data Driving IC Dummy Channels for Gate Signal Delay Compensation

The patent measures the gate signal delay time in advance using dummy data channels and sensing pins before actual display operation. The timing controlling part stores these measured delay times and uses them to pre-adjust the data signal output timing, compensating for the delay before it affects pixel charging. This preliminary measurement and adjustment approach resolves the contradiction by maintaining fast charging rates even when the gate driving part is positioned far from the gate line to cover larger display areas.

The patent implements a feedback mechanism where the timing controlling part receives delay time information from the measured gate signal propagation through dummy channels. Based on this feedback, the system automatically adjusts the output timing of data signals to compensate for the propagation delay. This ensures that pixel voltage charging occurs at the optimal moment regardless of the distance between the gate driving part and gate lines, maintaining high charge rates across the entire display panel.

The patent uses dummy data channels that replicate the electrical characteristics and routing of actual data channels to measure gate signal delay. By creating simplified copies of the signal path with sensing pins at critical points, the system can accurately measure propagation delay without requiring complex measurement equipment or invasive modifications to the display panel structure. This copying approach provides precise delay measurement while adding minimal complexity to the overall device.