Display Data Encoder Clock Recovery Stability

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Solution Overview

Problem

Existing data transmission systems for display devices face instability due to frequency and phase differences between received data and recovery clock, particularly when analog gray scale voltage is generated, leading to inadequate correction of these differences at high speeds, which affects the stability of data transmission.

Innovation Solution

A data transmission system that employs an encoder with a translation table to encode m bits of data into n bits, a clock recovery circuit to recover the clock, and a decoder to output gray scale voltage, where the amplitude of the gray scale voltage influences the data change index, ensuring more frequent changes in bit patterns to enhance data transmission stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If the amplitude of gray scale voltage is increased to improve display performance, then the noise generated increases, but the frequency and phase difference correction capability of the clock recovery circuit deteriorates

Engineering Contradiction:
Improvegray scale voltage amplitudeVSAvoidfrequency and phase difference correction
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

The patent changes the data transmission parameters by using mBnB encoding to modify the bit pattern characteristics. This encoding transforms the data so that bit patterns with larger data change indices are transmitted more frequently, which provides more frequent transitions for the clock recovery circuit to lock onto, thereby improving frequency and phase synchronization even when noise is present due to high gray scale voltage amplitude.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies different transmission characteristics to different bit patterns based on their data change indices. By assigning higher transmission frequency to bit patterns with larger data change indices, the system creates local quality variations in the transmitted signal that specifically address the synchronization problem without affecting the overall gray scale voltage amplitude needed for display performance.

Inventive Principle:
Principle #3Local quality

2Productivity

If data transmission speed is increased to improve productivity, then the frequency and phase difference correction time increases, but the data transmission stability deteriorates

Engineering Contradiction:
Improvedata transmission speedVSAvoiddata transmission stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary encoding of the data using mBnB encoding before transmission. This preprocessing ensures that the encoded bit patterns have optimized data change indices that facilitate faster locking by the clock recovery circuit. By preparing the data in advance with appropriate encoding, the system enables faster frequency and phase correction without sacrificing transmission stability, thus resolving the contradiction between high transmission speed and stability.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If mBnB encoding is used to prevent consecutive signals of the same level, then the mark rate improves, but the device complexity increases

Engineering Contradiction:
Improvemark rateVSAvoidencoding system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the data transmission process into encoding and decoding stages with clear functional separation. The mBnB encoding divides the data into groups that are transformed according to predefined tables, creating a systematic approach to preventing consecutive same-level signals. This segmentation makes the complexity manageable by breaking down the encoding task into discrete, table-driven operations rather than complex real-time processing.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10170028B2Data transmission system including encoder and a clock recovery system for display device, data transmission method for display device and display device
Publication Date: 2019.01.01 RENESAS ELECTRONICS CORP
  • US10170028B2 patent drawing
  • US10170028B2 patent drawing
  • US10170028B2 patent drawing

AI summary

A data transmission system for a display device, the data transmission system comprising: an encoder having at least one translation table, encoding m bits of a data into n bits of a data on the basis of the translation table; a parallel-to-serial converter; a clock recovery circuit for recovering a clock from the data encoded and serialized; a serial-to-parallel converter for decoding the n bits of the encoded data to the m bits of the data; and an output driver for outputting a gray scale voltage, wherein an amplitude of the gray scale voltage is determined according to a value of the m bit of the data, and, wherein in the translation table, a larger the amplitude of the gray scale voltage of a bit pattern in 2 m pieces of bit patterns of the m bits of the data, a larger the data change index of the bit pattern.