Display Data Line Clock Signal Transmission During Blank Period
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Solution Overview
Problem
Conventional display technologies require separate clock lines, which generate electromagnetic interference (EMI) and increase the number of signal lines, making them less efficient compared to Point-to-Point Differential Signaling (PPDS) methods.
Innovation Solution
Transmitting the clock signal through the data line during the blank period, eliminating the need for a separate clock line and allowing simultaneous transmission of the clock signal and control bits, thereby reducing EMI and signal line count.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate clock line is used to transmit clock signal, then clock signal transmission is reliable, but electromagnetic interference increases and signal line count increases
Solution Approach 1:
The patent merges the clock signal transmission function into the existing data line by utilizing the blank period when no data is transmitted. The timing controller switches the data line to transmit clock signals during these blank periods, eliminating the need for a separate clock line and thereby reducing electromagnetic interference while maintaining reliable clock signal transmission.
Solution Approach 2:
The data line is designed to perform multiple functions: transmitting data signals during active periods and transmitting clock signals during blank periods. This multi-functionality allows the system to eliminate dedicated clock lines while ensuring both data and clock signal transmission requirements are met reliably.
2Reliability
If a separate clock line is used to transmit clock signal, then clock signal transmission is reliable, but the number of signal lines increases
Solution Approach 1:
The patent combines the clock signal transmission function into the existing data line infrastructure. By utilizing the blank period when no data transmission occurs, the data line serves dual purposes, eliminating the need for additional dedicated clock lines and reducing overall signal line count and device complexity.
Solution Approach 2:
The data line is designed to perform multiple functions: transmitting data signals during active periods and transmitting clock signals during blank periods. This multi-functionality allows the system to eliminate dedicated clock lines while ensuring both data and clock signal transmission requirements are met reliably.
3Object-generated harmful factors
If data line is used to transmit clock signal during blank period, then EMI is reduced and signal line count is reduced, but signal transmission timing must be precisely controlled
Solution Approach 1:
The patent employs periodic action by utilizing the regular blank periods between data transmission frames to transmit clock signals. The timing controller is configured to switch the data line to clock signal mode during these predictable blank periods, and the data driver is synchronized to expect clock signals during these same periods, making timing control manageable despite the shared line usage.
Solution Approach 2:
The timing controller and data driver are pre-configured with knowledge of when blank periods occur and when clock signals will be transmitted on the data line. This preliminary arrangement allows both devices to synchronize their operations in advance, ensuring proper timing control and signal sampling without interference from data transmission.
Data Source
AI summary
A display device includes a data line, a timing controller configured to apply a transmission signal corresponding to data bits to a data line during an active period in which the data bits are transmitted and apply a transmission clock signal to the data line during a blank period in which the data bits are not transmitted, and a data driver configured to sample the transmission signal (hereinafter, a reception signal) applied through the data line to recover the data bits and drive a display panel according to the recovered data bits. The display device can transmit a clock signal through the data line during the blank period.