Display Device Data Line Segmentation for Parasitic Capacitance Reduction

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Solution Overview

Problem

In display devices, parasitic capacitance between adjacent data lines can cause interference, affecting the emission of light and image formation.

Innovation Solution

The display device is designed with subpixels arranged in a specific configuration, where data lines are positioned on opposing sides of the subpixels, and scanning lines are perpendicular to these data lines, reducing parasitic capacitance by optimizing the layout of wiring and transistor connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If data lines are arranged adjacent to each other to connect multiple subpixels, then the device complexity is reduced and manufacturing is simplified, but parasitic capacitance between adjacent data lines increases causing interference

Engineering Contradiction:
Improvedata line arrangementVSAvoidparasitic capacitance interference
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The data lines are segmented into first and second data lines positioned on opposite sides of the subpixel column, separating the current paths to reduce parasitic capacitance while maintaining connectivity to multiple subpixels

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The data lines are arranged in the first direction (horizontal) rather than stacked in the second direction (vertical), utilizing the lateral dimension to separate conductors and reduce capacitive coupling

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If data lines are positioned close to subpixels for efficient signal delivery, then the speed of signal transmission is improved, but parasitic capacitance interference increases

Engineering Contradiction:
Improvesignal transmission speedVSAvoidparasitic capacitance interference
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

Signal paths are segmented into separate first and second data lines on opposite sides, allowing each line to maintain close proximity to its target subpixels while avoiding interference with other data lines

Inventive Principle:
Principle #1Segmentation

3Object-affected harmful factors

If wiring is optimized to reduce parasitic capacitance by positioning data lines on opposing sides, then interference is reduced, but the device complexity increases

Engineering Contradiction:
Improveparasitic capacitance interferenceVSAvoidwiring configuration
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The wiring configuration uses asymmetric positioning of data lines on opposite sides of the subpixel column rather than symmetric arrangements, reducing parasitic capacitance while maintaining manufacturing feasibility through standardized patterns

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS9349783B2Display device
Publication Date: 2016.05.24 SAMSUNG DISPLAY CO LTD
  • US9349783B2 patent drawing
  • US9349783B2 patent drawing
  • US9349783B2 patent drawing

AI summary

A display device includes at least two subpixels arranged in a first direction, a first data line connected to a first subpixel of the two subpixels, and a second data line connected to a second subpixel of the two subpixels. The first data line is arranged at a first side of the two subpixels and the second data line is arranged at a second side of the two subpixels. The first and second sides are opposing sides relative to the first and second subpixels.