Display Data Lines Driver Power-On Reset Circuit
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Solution Overview
Problem
Display apparatuses experience unstable display quality during power-up mode due to irregular power voltage and data voltage transitions, leading to uncomfortable user experiences and reduced reliability, especially in high-resolution large area displays with larger capacitances.
Innovation Solution
A data lines driver with a digital-to-analog converter, buffer, and power-on/reset part that generates an initial data voltage signal varying with time, allowing selective output of either the initial or normal data voltage signal to improve display quality during initial power-up phases by mimicking the common voltage signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the display apparatus is powered up normally without special handling, then the power supply transitions from off to stable mode, but abnormal images are displayed during the transition period due to irregular power voltage and data voltage levels
Solution Approach 1:
The power-on/reset part generates an initial data voltage signal before normal operation begins, preparing the display system in advance for stable power-up. This preliminary voltage generation ensures that when power is first applied, the display panel receives appropriate voltage levels immediately, preventing abnormal images during the transition period.
Solution Approach 2:
The power-on/reset part acts as an intermediary component between the normal data lines driver and the display panel during power-up. It provides a specialized initial data voltage signal that mediates the transition from powered-off to stable operation, ensuring the display panel receives appropriate voltage levels during the critical transition period before normal driving begins.
2Manufacturing precision
If high resolution large area displays are used to improve display quality, then the common electrode and panel line capacitances increase, but the power-up time is prolonged due to slower charging of larger capacitances
Solution Approach 1:
The initial data voltage signal is generated in advance during the power-on/reset period, preparing the display system before normal operation begins. This preliminary action allows high-resolution displays with large capacitances to start receiving appropriate voltage levels immediately upon power application, reducing the effective power-up time despite the larger energy storage requirements.
Solution Approach 2:
The power-on/reset part changes the voltage parameter dynamically during power-up by generating an initial data voltage signal that varies as a function of time. This time-varying voltage approach allows the system to accommodate large capacitances in high-resolution displays while maintaining appropriate voltage levels throughout the charging process, preventing display abnormalities during the extended power-up period.
3Stability of the object's composition
If the power voltage and data voltage transition quickly to stable levels to reduce power-up time, then the display quality during transition may be compromised, but if they transition slowly to ensure stability, then the power-up time is prolonged
Solution Approach 1:
The power-on/reset part prepares the initial data voltage signal in advance before normal operation begins. This preliminary preparation ensures that when power is applied, the voltage transitions are managed appropriately from the start, balancing both speed and stability during the critical power-up period.
Solution Approach 2:
The initial data voltage signal varies as a function of time, creating a periodic or time-dependent voltage pattern during power-up. This time-varying approach allows the system to provide appropriate voltage levels at different stages of power-up, ensuring stability during the transition while managing the overall power-up duration effectively.
Data Source
AI summary
A data lines driver includes a digital to analog converter configured to generate a normal data voltage based on a data signal, a buffer configured to buffer the normal data voltage and a power-on/reset part configured to generate an initial data voltage varying according to time and to selectively output either the initial data voltage or the normal data voltage.