Dual-Layer Display Data Lines for Lower RC Delay
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Solution Overview
Problem
Existing display apparatuses face challenges in achieving high-speed operation while minimizing RC delay due to differences in charging and discharging speeds of pixel circuits, which are not effectively addressed by conventional manufacturing processes.
Innovation Solution
The display apparatus incorporates a dual-wire structure for data lines, comprising an upper and lower line configuration to alternately transfer data signals, and utilizes oxide semiconductor materials for thin film transistors, along with a method of manufacturing that includes half-tone exposure and etching techniques to form precise patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional single data line structure is used, then manufacturing process is simple, but RC delay increases during high-speed operation
Solution Approach 1:
The data line is segmented into two separate lines (first data line and second data line) that are alternately connected to different pixels. This segmentation allows each line to carry data signals for specific pixels during different time periods, effectively reducing the capacitive load and RC delay on each individual line while enabling high-speed operation.
2Area of moving object
If data lines are made thinner to reduce pixel area, then pixel density increases, but resistance increases causing greater RC delay
Solution Approach 1:
By dividing the data transmission task across two separate lines, each line serves fewer pixels at a time, allowing the lines to be made thinner without increasing resistance excessively. The alternating connection scheme ensures that each thin line only needs to drive a subset of pixels, maintaining signal integrity while reducing overall pixel area.
3Speed
If oxide semiconductor material is used in thin film transistors, then switching performance improves reducing RC delay, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs a half-tone exposure process that performs preliminary patterning before final etching. This preliminary action creates a precursor pattern that guides subsequent precise etching steps, allowing oxide semiconductor TFTs to be formed with high precision without requiring the exposure process itself to achieve final pattern accuracy, thus reducing manufacturing complexity.
Data Source
AI summary
A display apparatus includes a substrate, a first pixel, a second pixel, a first wire set, and a second wire set. The first pixel and the second pixel overlap the substrate and neighbor each other in a first direction. The first wire set extends in a second direction, includes a first conduction line and a first transmission line, and may transfer a first data signal. The first conduction line is positioned between the substrate and the first transmission line and is connected through the first transmission line to the first pixel. The second wire set extends in the second direction, includes a second conduction line and a second transmission line, and may transfer a second data signal. The second conduction line is positioned between the substrate and the second transmission line and electrically connects the second transmission line to the second pixel.