Data Transmission Circuit for Display Timing Controller
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Solution Overview
Problem
Existing display devices face challenges in long-range data transmission/reception between the timing controller and memory, leading to inconvenience during assembly and modularization, and require frequent replacement of memory adjacent to the timing controller in case of failure.
Innovation Solution
A data transmission/reception circuit with a transmission direction setting unit using tri-state buffers and data format converters to manage data paths, enabling long-range communication and avoiding collisions between input and output signals, and allowing separate packaging of components to reduce costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data transmission is performed over long distance between timing controller and memory, then assembly flexibility and modularization are improved, but signal collision and communication stability deteriorate
Solution Approach 1:
A data transmission/reception circuit is introduced as an intermediary component between the timing controller and memory. This circuit includes transmission direction setting units that mediate the data flow, preventing signal collision while enabling long-range communication. The intermediary manages the bidirectional data transmission by controlling when data is sent versus received, thus maintaining communication stability despite increased physical distance and assembly flexibility.
2Adaptability or versatility
If bidirectional data transmission is enabled between timing controller and memory, then functional versatility is improved, but signal collision between input and output deteriorates
Solution Approach 1:
The data transmission/reception circuit employs periodic action by alternating between transmission periods and reception periods. During transmission periods, the circuit sends data from the timing controller to memory; during reception periods, it receives data from memory. This periodic switching is controlled by transmission direction setting units that enable or disable specific tri-state buffers at appropriate times, preventing signal collision while maintaining bidirectional functionality.
Solution Approach 2:
The circuit uses dynamic control of transmission direction through tri-state buffers that can be enabled or disabled based on operational mode. The transmission direction setting units dynamically switch the buffer states according to whether data transmission or reception is currently required, allowing the system to adapt its data flow direction in real-time and avoid signal collision between simultaneous input and output operations.
3Ease of manufacture
If timing controller and memory are packaged separately to reduce costs, then manufacturing cost is improved, but device complexity increases
Solution Approach 1:
The system is segmented into separate functional modules: timing controller, memory, and data transmission/reception circuit. This segmentation allows each component to be manufactured and packaged independently, reducing overall packaging costs and enabling flexible assembly. The data transmission/reception circuit acts as a bridge module that manages communication between the separated components, making the segmentation feasible while maintaining system functionality.
Data Source
AI summary
A display device includes a display panel configured to display an image, a timing controller configured to control the display panel, a memory operating in association with the timing controller, and a data transmission/reception circuit configured to write data to the memory or to read data from the memory under the control of the timing controller, wherein the data transmission/reception circuit includes a transmission direction setting unit configured to set a data transmission/reception path depending on a data transmission period or a data reception period in order to avoid collision between input and output during data transmission/reception.