Display De-Multiplexer Timing for Accurate Pixel Brightness
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Solution Overview
Problem
High-resolution display devices face challenges in reducing cost and volume due to excessive data driver circuits and incorrect brightness caused by control terminals of driving transistors not receiving correct data voltage.
Innovation Solution
Incorporating a de-multiplexer with switch transistors controlled by clock signals and a pre-charge circuit to overlap scan waveforms with clock waveforms, allowing for reduced data driver circuits and ensuring correct brightness by overlapping scan and clock periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the number of data driver circuits is reduced, then cost and volume are reduced, but brightness accuracy deteriorates because control terminals cannot obtain correct data voltage
Solution Approach 1:
The patent applies preliminary action by pre-charging data signal lines before data voltages are transmitted. The pre-charge circuit raises the voltage level of data signal lines in advance, ensuring that when data voltages arrive at pixel circuits, the control terminals can correctly receive them even with reduced data driver circuits. This preliminary voltage preparation resolves the brightness accuracy issue while maintaining circuit reduction.
Solution Approach 2:
The patent introduces a pre-charge circuit as an intermediary component between the reduced data driver circuits and the pixel circuits. This intermediary circuit prepares the data signal lines by pre-charging them to appropriate voltage levels, enabling correct data voltage transmission without requiring a full complement of data driver circuits. The pre-charge circuit acts as a mediator that facilitates accurate brightness control despite circuit reduction.
2Productivity
If scan waveform period is overlapped with clock signal period, then data transmission efficiency is improved, but signal interference may occur
Solution Approach 1:
The patent applies preliminary action by pre-charging data signal lines before the overlapping period of scan waveform and clock signal. This ensures that when signals overlap and transmit data simultaneously, the data signal lines are already at the correct voltage level, preventing signal interference and maintaining signal integrity during efficient overlapping transmission.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the voltage level of data signal lines through the pre-charge circuit during the overlapping period. By changing the voltage parameter of data signal lines in advance, the patent enables reliable data transmission during the overlapping of scan and clock signals, transforming a potentially problematic timing overlap into an efficient transmission window.
Data Source
AI summary
A display device includes a plurality of pixels and a de-multiplexer. The plurality of pixels are electrically connected to a plurality of data signal lines and a scan signal line, and configured to receive a scan signal through the scan signal line. The de-multiplexer includes a plurality of switch transistors electrically connected to the plurality of pixels through the plurality of data signal lines. The plurality of switch transistors are controlled by a plurality of clock signals. A period of a scan waveform of the scan signal is at least partially overlapped with a period of one of the plurality of clock signals with a last clock waveform. The period of the scan waveform of the scan signal is started after a start of the last clock waveform.