Display Device Multi-Layer Gate Structure High Resolution

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Solution Overview

Problem

Existing display devices struggle to achieve high resolution while maintaining a rigid and efficient structure.

Innovation Solution

The display device incorporates an active layer, multiple gate layers with specific electrodes and capacitors, a data conductive layer, and an inorganic insulating layer to form a high-resolution rigid display device. This configuration includes a multi-layer structure for the third gate layer using low-resistance metals and minimizes additional data conductive layers and organic insulating layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple insulating layers and conductive layers are added to improve resolution, then manufacturing complexity increases

Engineering Contradiction:
ImproveresolutionVSAvoidlayer structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines the inorganic insulating layer and organic insulating layer into a single integrated insulating structure. The inorganic insulating layer serves dual purposes as both insulator and protective barrier, while the organic insulating layer provides additional insulation and planarization. This merged approach achieves high resolution requirements without proportionally increasing manufacturing complexity, as the layers are formed in a sequential but integrated manufacturing process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The inorganic insulating layer performs multiple functions simultaneously: it provides electrical insulation between conductive layers, acts as a barrier layer to prevent material diffusion, and serves as a structural support layer. The third gate layer functions both as a gate electrode and as part of the capacitor structure. This multi-functionality reduces the total number of separate layers needed, thereby improving resolution without linearly increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If additional data conductive layers are added to improve signal transmission, then device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvesignal transmissionVSAvoidmanufacturing difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the data conductive layer with the third gate layer into a single conductive structure. The third gate layer serves dual purposes as both gate electrode and data transmission conductor. This integration ensures reliable signal transmission to the light emitting element while avoiding the need for separate dedicated data conductive layers, thereby reducing manufacturing difficulty and process steps.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If more organic insulating layers are added between data conductive layer and pixel electrode, then resolution and device performance improve, but manufacturing complexity increases

Engineering Contradiction:
ImproveresolutionVSAvoidinsulating layer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The organic insulating layer is designed to perform multiple functions: providing electrical insulation, enabling planarization for subsequent layer deposition, and serving as a structural foundation for the pixel electrode. This single multi-functional layer achieves the resolution requirements without needing multiple separate insulating layers, thereby improving resolution while controlling device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250081771A1Display device
Publication Date: 2025.03.06 SAMSUNG DISPLAY CO LTD
  • US20250081771A1 patent drawing
  • US20250081771A1 patent drawing
  • US20250081771A1 patent drawing

AI summary

A display device includes: an active layer disposed on a substrate, a first gate layer disposed on the active layer and including a first gate electrode, a second gate layer disposed on the first gate layer and including a capacitor electrode partially overlapping the first gate electrode, the capacitor electrode and the first gate electrode forming a first capacitor, a third gate layer disposed on the second gate layer and including a first power voltage line partially overlapping the capacitor electrode and receiving a first power voltage, the first power voltage line and the capacitor electrode forming a second capacitor, a data conductive layer disposed on the third gate layer, and an inorganic insulating layer disposed between the third gate layer and the data conductive layer, and covering the third gate layer.