Image Display Device Multi-Core Power Management

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Image display devices used in IoT systems face high power consumption when continuously monitoring IoT device states, leading to increased energy costs and potential inefficiencies, especially when in power-off states.

Innovation Solution

The implementation of a dual software program system within the image display device, where a first program handles primary functions like image processing in a power-on state and a second program manages state information reception and transmission in both power-on and power-off states using a processor with multiple cores, allowing for reduced power consumption by deactivating cores during idle periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the image display device continuously monitors IOT device states, then the monitoring function is maintained, but power consumption increases

Engineering Contradiction:
Improvemonitoring functionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The processor is divided into multiple cores (first core and second core) that can be independently controlled. The first core handles power-on state operations while the second core handles power-off state operations, allowing selective activation based on operational requirements to reduce overall power consumption

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically switches between different operational modes by loading different software programs based on power state. In power-on state, the first program is executed with multiple cores active; in power-off state, only the second program is executed with fewer cores active, adapting resource allocation to current needs

Inventive Principle:
Principle #15Dynamics

Solution Approach 3:

The system changes operational parameters by switching between different software programs (first program vs. second program) and different processor core activation states. This allows the monitoring function to be maintained with modified parameters (reduced core activity) during power-off state, achieving lower power consumption while preserving essential functionality

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If multiple software programs are loaded for different power states, then power management flexibility is improved, but device complexity increases

Engineering Contradiction:
Improvepower management flexibilityVSAvoidsoftware program management
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Both the first program and second program are pre-loaded into the memory device before power state transitions occur. This preliminary preparation allows instant switching between programs based on power state without requiring complex real-time compilation or generation, simplifying the transition management

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and separates the power-state-specific functionality into distinct software programs (first program for power-on, second program for power-off). This extraction allows each program to be independently optimized and managed, reducing the complexity of managing a single monolithic program that would need to handle all power states

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP3118720B1Apparatus for displaying an image and management of a plurality of processing cores, and method of operating the same
Publication Date: 2020.03.11 SAMSUNG ELECTRONICS CO LTD
  • EP3118720B1 patent drawingFigure 1
  • EP3118720B1 patent drawingFigure 2
  • EP3118720B1 patent drawingFigure 3

AI summary

An apparatus for displaying an image includes a non-volatile memory device configured to store a first program and a second program; and a processor configured to load the first program onto a first area of a volatile memory device to execute the first program in a power-on state of the apparatus, wherein the processor includes a plurality of cores, and in a power-off state of the apparatus, the processor is configured to deactivate at least one of the plurality of cores, deactivate the first program loaded onto the first area, and load the second program onto a second area of the volatile memory device to execute the second program, wherein the first program and the second program, when executed, are configured to cause the processor to receive state information of an external device.