Display with Discrete Gate-in-Panel Circuitry for Reduced Bezel Size

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Traditional displays are limited by the size of the bezel, which reduces the active display area and affects user experience and aesthetic appeal, as the bezel contains processing components that occupy valuable space.

Innovation Solution

Incorporating gate-in-panel (GIP) circuits within the active display area, specifically in an extended active display area with embedded pixels, allows for a reduced bezel size by increasing the active display area and distributing GIP circuits among the pixels, thereby enhancing pixel density and display efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If processing components are placed in a bezel surrounding the active display area, then the display can function properly with all necessary circuitry, but the bezel size increases and the active display area decreases

Engineering Contradiction:
Improveactive display areaVSAvoidbezel size
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent moves GIP circuits from the traditional bezel area (peripheral dimension) into the active display area itself (internal dimension). By embedding circuits within the pixel array structure, the display utilizes the two-dimensional pixel grid space to house processing components, effectively transforming the spatial arrangement from peripheral to integrated, thereby reducing bezel size while maintaining full display functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nesting by placing GIP circuits within the active display area structure. Specifically, circuits are integrated into the pixel array where certain pixels contain both display functionality and circuit components, creating a nested arrangement where processing elements are housed within the display structure itself rather than occupying separate bezel space.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If GIP circuits are embedded within the active display area, then the bezel size is reduced, but the pixel density in certain areas decreases due to circuit occupancy

Engineering Contradiction:
Improveactive display areaVSAvoidpixel density
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating distinct zones within the active display area. The first active display area maintains high pixel density without GIP circuits, while the second extended active display area contains GIP circuits with correspondingly lower pixel density. This spatial differentiation allows the display to optimize for both high-resolution viewing and circuit integration, with each region having properties tailored to its specific function.

Inventive Principle:
Principle #3Local quality

3Area of stationary object

If the bezel is reduced in size, then the aesthetic appeal and user experience improve, but there is less space available for processing components

Engineering Contradiction:
Improveactive display areaVSAvoidprocessing component space
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent merges the functions of the display area and the processing area by integrating GIP circuits within the active display area. Instead of keeping these functions separate in traditional bezel locations, the circuitry and pixel array are combined into a single integrated structure, allowing the display to serve dual purposes: visual output and signal processing, thereby eliminating the need for separate bezel space.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11842674B2Display with discrete gate-in-panel circuitry
Publication Date: 2023.12.12 GOOGLE LLC
  • US11842674B2 patent drawing
  • US11842674B2 patent drawing
  • US11842674B2 patent drawing

AI summary

Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for a display with discrete gate-in-panel circuitry. In some implementations, a display includes an array of emissive pixels arranged in rows and columns, where the array includes a first continuous area having a first pixel density and a second continuous area having a second pixel density less than the first pixel density, and consecutive rows of the emissive pixels extending between the first and second continuous areas. The display also includes gate in panel (GIP) circuits in the second continuous area, a data lines connected to the array of emissive pixels, and signal lines connected to the array of emissive pixels.