Display Drive Circuit Settling Time Reduction via Discharge Lines
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional source drive circuits for display panels face issues with increased settling time due to high definition requirements, leading to insufficient gray levels, display noise, and uneven displays, exacerbated by the effects of gate capacitance and rapid potential changes during gray scale switching.
Innovation Solution
A drive circuit configuration that includes multiple source amps, a gray scale reference voltage generating circuit, and a digital/analog conversion circuit, with each input node connected to a power source line during specific periods to manage charge and reduce gate capacitance effects, using power source lines with potentials closest to the selected gray scale voltage to stabilize output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple input nodes of source amps are electrically connected to a single reference voltage bus line, then the circuit complexity is reduced, but the load on the reference voltage bus line increases due to gate capacitance effects
Solution Approach 1:
The patent divides the single reference voltage bus line into multiple separate reference voltage bus lines, with each source amp connected to its own dedicated bus line. This segmentation isolates the gate capacitance load of each source amp to its respective bus line, preventing the cumulative load effect that would occur if all source amps shared a single bus line.
2Speed
If gray scale reference voltages are switched rapidly between different bus lines, then the response speed is improved, but potential fluctuations occur due to charge accumulation in gate capacitance
Solution Approach 1:
The patent introduces a discharge path that is activated before the source amp needs to switch to a new reference voltage bus line. By discharging the gate capacitance of the input transistor in advance, the circuit prepares to avoid potential fluctuations during the voltage switching transition, thus maintaining potential stability while enabling rapid switching.
3Device complexity
If gate capacitance of input transistors is not discharged, then the circuit structure is simplified, but rapid potential changes occur during gray scale switching
Solution Approach 1:
The patent introduces a discharge path as an intermediary component that provides a controlled path for the gate capacitance charge to dissipate. This discharge path acts as a mediator between the gate capacitance and the reference voltage bus line, allowing charge to be managed during switching transitions and preventing harmful potential fluctuations without significantly complicating the overall circuit structure.
Data Source
AI summary
A driving circuit and a display device, to realize the drive circuit where settling time (stabilization time) is shortened, comprise power source lines for discharge (DCL1 through DCLJ). Each input node of a plurality of source amps (AMn) is electrically connected to the power source line for discharge (DCL1) during a first period and a second period in which a DAC circuit (2) supplies a gray scale reference voltage (V0 to V255) that has been selected to each of the plurality of source amps (AMn).