Display Drive Circuit Timing for Stable Pixel Electrode Potentials
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Solution Overview
Problem
High-definition display devices in virtual reality, augmented reality, and mixed reality configurations face display quality deterioration due to charge redistribution in holding capacitance, particularly exacerbated by parasitic capacitance between pixel electrodes and other conductive members.
Innovation Solution
A display device design that simultaneously turns on and then sequentially turns off pixel transistors in a specific order, minimizing potential differences caused by parasitic capacitance between adjacent gate lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high definition is achieved in display devices, then display quality is improved, but holding capacitance decreases and parasitic capacitance effects increase causing pixel electrode potential deterioration
Solution Approach 1:
The drive circuit performs preliminary action by sequentially turning off adjacent pixel transistors before the holding capacitance charge redistribution can occur. Specifically, when a pixel transistor is turned off, the drive circuit immediately turns off the transistor of the pixel in the vertical direction before the gate voltage can cause significant charge redistribution in the holding capacitance, thereby preventing potential deterioration in advance
Solution Approach 2:
The invention applies preliminary anti-action by counteracting the harmful effect of parasitic capacitance through a specific timing sequence. The drive circuit prevents the gate-source parasitic capacitance from causing potential drops by ensuring that adjacent pixel transistors are turned off before the current pixel transistor is fully turned off, thereby counteracting the charge redistribution effect before it can manifest as display quality deterioration
2Productivity
If simultaneous driving of multiple pixel transistors is implemented, then frame rate is improved, but charge redistribution in holding capacitance causes display quality deterioration
Solution Approach 1:
The drive circuit performs preliminary action by sequentially turning off adjacent pixel transistors before the holding capacitance charge redistribution can occur. Specifically, when a pixel transistor is turned off, the drive circuit immediately turns off the transistor of the pixel in the vertical direction before the gate voltage can cause significant charge redistribution in the holding capacitance, thereby preventing potential deterioration in advance
Solution Approach 2:
The invention applies dynamics by changing the timing sequence of pixel transistor turn-off from simultaneous to sequential. The drive circuit dynamically adjusts the turn-off timing of adjacent pixel transistors based on the state of the current pixel transistor, creating a staggered turn-off sequence that prevents charge redistribution while maintaining high frame rate operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses display quality deterioration by managing charge redistribution, maintaining accurate pixel electrode potentials and enhancing image fidelity.
Implementation Method 1
not only holding capacitance formed between a pixel electrode and a common electrode but also parasitic capacitance is generated between the pixel electrode and other conductive members
Implementation Method 2
parasitic capacitance is generated between the pixel electrode and other conductive members
Implementation Method 3
a pixel electrode potential decreases due to charge redistribution in the holding capacitance in a gate-off state
Data Source
AI summary
A display device includes: first pixels and second pixels arrayed in a first direction and arranged adjacent to each other in a second direction; first and second gate lines coupled to gates of pixel transistors of first and second pixels, respectively; a drive circuit to drive the pixel transistors of the first pixel and the second pixel via the first and the second gate lines, respectively; and a display region in which the first gate line, the pixel transistor of the first pixel, the second gate line, and the pixel transistor of the second pixel are arrayed in order in the second direction. Further, the drive circuit simultaneously turns on the pixel transistor of the first pixel and the pixel transistor of the second pixel, and then sequentially turns off the pixel transistor of the second pixel and the pixel transistor of the first pixel in order.


