Display Drive IC Self-Refresh Timing Synchronization
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Solution Overview
Problem
Display drive ICs face issues with unnecessary power consumption and screen flickering when displaying still images, particularly in portable devices, due to the limitations of panel self-refresh technology.
Innovation Solution
A display drive integrated circuit with a frame buffer, output selector, and timing controller that synchronizes internal display timing with external timing by adjusting the frame read rate and vertical blank interval, preventing screen flickering by storing and outputting image data in a way that matches the frame transmission rate from the host.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If panel self-refresh technology is used to display still images, then power consumption is reduced, but screen flickering occurs
Solution Approach 1:
The patent applies dynamics by making the frame read rate adjustable rather than fixed. The timing controller dynamically changes the frame read rate based on the time difference between external display timing and internal display timing, allowing the system to adapt to different synchronization conditions and eliminate flickering while maintaining power savings
Solution Approach 2:
The patent changes the parameter of frame read rate to resolve the contradiction. By adjusting the frame read rate according to the measured time difference between external and internal timing, the system can synchronize display output with external signals, eliminating screen flickering while preserving the low power consumption benefits of self-refresh mode
2Reliability
If frame read rate is increased to synchronize with external timing, then display synchronization is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by adjusting the frame read rate based on the measured time difference. When the time difference is small, the system uses a lower frame read rate to save power. When the time difference is large, the system increases the frame read rate to achieve synchronization, thus balancing power consumption and synchronization quality
3Use of energy by moving object
If vertical blank interval is extended to reduce frame rate, then power consumption is reduced, but display timing synchronization is worsened
Solution Approach 1:
The patent applies dynamics by making the vertical blank interval adjustable rather than fixed. The timing controller dynamically changes the vertical blank interval based on the time difference between external and internal timing, allowing the system to extend it for power saving when synchronization is not critical, and reduce it when synchronization is required
Data Source
AI summary
A display drive integrated circuit includes a frame buffer, an output selector and a timing controller. The output selector selectively outputs one of image data read from the frame buffer and image data transmitted from a source external to the display drive integrated circuit. The timing controller controls output of the image data read from the frame buffer to the display panel in a self-refresh mode, and controls internal display timing to track external display timing when the display drive integrated circuit exits from the self-refresh mode to control the output selector to output the image data transmitted from the source to the display panel when the internal display timing is synchronized to the external display timing.