Display Driver Asynchronous Row Timing and Segmented Buffer
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Solution Overview
Problem
Existing display driver circuits require significant memory and bandwidth to store and write video data to pixel arrays, leading to increased chip size, manufacturing defects, and visually perceptible aberrations due to high pulse transitions.
Innovation Solution
A display driver method that asynchronously drives rows of a display device by temporally offsetting the time periods for asserting electrical signals on pixels, reducing the number of pulse transitions and memory requirements, and using a single storage latch per pixel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a large input buffer is used to store one frame of video data for each pixel, then the video data can be stored completely, but the chip space required increases significantly
Solution Approach 1:
The pixel array is divided into multiple blocks, and the input buffer is segmented to store only one block of video data at a time rather than the entire frame. This segmentation allows the buffer size to be reduced from storing all 1280×768 pixels to storing only a portion, significantly decreasing chip space requirements while maintaining complete video data storage capability through sequential block processing
Solution Approach 2:
The patent introduces a temporal dimension to the data processing by sequentially writing different blocks of video data to the pixel array over time rather than requiring all data to be available simultaneously. This allows the input buffer to hold minimal data at any given moment while still achieving complete frame rendering through time-based sequential updates
2Area of stationary object
If the input buffer capacity is reduced, then chip space decreases, but the bandwidth required to write video data increases significantly
Solution Approach 1:
The video data is segmented into multiple blocks that are written to the pixel array in sequential fashion. The input buffer holds one block at a time, and the row decoder processes each block sequentially. This segmentation transforms the bandwidth requirement from needing to transfer all frame data simultaneously to transferring smaller blocks sequentially, effectively reducing peak bandwidth requirements while maintaining complete data writing capability
Solution Approach 2:
Video data for each block is prepared and loaded into the input buffer in advance before being written to the pixel array. This preliminary action allows the buffer to be efficiently utilized with smaller data quantities at any moment, reducing the instantaneous bandwidth requirement while ensuring complete data transfer over the full frame period
3Productivity
If conventional display driving with high pulse transitions is used, then video data can be displayed, but visually perceptible aberrations occur
Solution Approach 1:
The patent implements a periodic debiasing scheme where the polarity of voltage pulses applied to liquid crystal pixels is alternated between successive frames or blocks. This periodic action maintains the RMS voltage required for proper grayscale display while canceling out DC bias accumulation that causes visual aberrations, thereby maintaining display update effectiveness while eliminating harmful visual artifacts
Solution Approach 2:
The patent changes the parameter of voltage pulse characteristics by implementing variable pulse widths and alternating polarities instead of uniform high-frequency transitions. By adjusting pulse duration and polarity dynamically, the system maintains effective display updates while reducing the number of high-frequency transitions that cause visual aberrations, optimizing both productivity and image quality
Data Source
AI summary
A novel method for asynchronously driving a display device including a plurality of pixels arranged in a plurality of columns and a plurality of rows includes the steps of receiving a first multi-bit data word indicative of a first grayscale value to be displayed on a pixel of a first row of the display, defining a first time period during which an electrical signal corresponding to the first grayscale value can be asserted on the pixel of said first row, receiving a second multi-bit data word indicative of a second grayscale value to be displayed on a pixel of a second row of the display, and defining a second time period that is temporally offset from the first time period during which an electrical signal corresponding to the second grayscale value can be asserted on the pixel of said second row. A novel display driver for performing the methods of the present invention is also disclosed.