Display Driver Circuit with Cascade Control for Multi-Frequency Screens
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Solution Overview
Problem
Display driver circuits in the related art only support full-screen switching frequencies, making it impossible to meet users' demands for displaying multiple scenarios within a single screen on a terminal product, as they cannot implement partitioned multi-frequency display.
Innovation Solution
A display driver circuit with cascade control modules that control the transmission of scan signals between shift registers, allowing for partitioned multi-frequency display by adjusting the switch states of these modules to cut off signal transmission at specific positions, enabling different refresh frequencies for different display regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If full-screen switching frequencies are used for the entire display panel, then the display can meet high-frequency requirements for gaming interfaces, but it cannot reduce power consumption for low-frequency interfaces and cannot implement partitioned multi-frequency display
Solution Approach 1:
The scan driving circuit is segmented into multiple independent scan driving circuits, each capable of driving a specific display region independently. Each scan driving circuit includes shift registers and cascade control modules that can be controlled separately, enabling different refresh frequencies for different regions. This segmentation allows the display panel to implement partitioned multi-frequency display without requiring a completely new circuit architecture.
Solution Approach 2:
The cascade control modules are designed to be dynamically controllable, allowing the scan signals to be selectively transmitted or blocked between shift registers. By dynamically adjusting the control signals to these modules, the system can flexibly partition the display panel into different frequency zones and adjust the refresh rates of each region in real-time according to display content requirements.
2Adaptability or versatility
If a single scan driving circuit is used for the entire display panel, then the circuit structure is simple, but it cannot support partitioned multi-frequency display for different application scenarios
Solution Approach 1:
The display panel is divided into multiple independent display regions, each driven by its own scan driving circuit. This allows high-frequency refresh rates to be applied only to regions requiring smooth animation (such as gaming interfaces), while other regions can operate at lower refresh rates (such as static information displays), thereby reducing overall power consumption while maintaining multi-scenario display capabilities.
Solution Approach 2:
Different regions of the display panel are assigned different refresh frequencies based on their specific display requirements. High-frequency refresh is applied locally to regions requiring smooth motion display, while low-frequency refresh is applied to regions with static or less demanding content, optimizing power consumption while maintaining display quality where needed.
3Ease of operation
If cascade control modules are added to enable partitioned multi-frequency display, then flexible frequency control for different regions is achieved, but the circuit complexity increases
Solution Approach 1:
The cascade control modules are designed with multi-functionality, serving both as signal transmission pathways and as frequency control nodes. These modules can operate in different modes (transmitting scan signals or blocking them) based on control signals, providing flexible frequency adjustment without requiring separate control mechanisms for each function, thereby managing complexity while maintaining operational flexibility.
Data Source
AI summary
A display driver circuit and a control method therefor, and a display device are disclosed. The display driver circuit includes: at least one first scan driving circuit, the at least one first scan driving circuit including: a plurality of first shift registers arranged in cascade, the first shift register including a register input terminal and a register output terminal, and the first shift registers are configured to output a plurality of scan signals; and at least one cascade control module, the at least one cascade control module being connected between a current-stage register output terminal and a next-stage register input terminal, and the at least one cascade control module being connected to a cascade control signal.