Display Driver Reducing Clock Signals to Save Circuit Area
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Solution Overview
Problem
Traditional display drivers require four clock signals, which occupy significant circuit area and increase the number of transistors, bonding zones, and reduce reliability due to complex circuitry.
Innovation Solution
The display driver is redesigned to operate using three clock signals instead of four, achieved through a configuration of driver stages with specific transistor and controller arrangements, allowing for reduced control signals and improved circuit efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional four clock signals are used to drive emission control line driver, then the driver can achieve proper emission control function, but the circuit area increases and the number of transistors increases
Solution Approach 1:
The patent combines the functions of four separate clock signals into three clock signals by merging the emission control signal generation logic. Specifically, the emission control line driver uses three clock signals (CK1, CK2, CK3) to generate the necessary emission control signals for multiple emission control lines, thereby reducing the total number of clock signal lines and associated transistors while maintaining proper emission control functionality.
Solution Approach 2:
The three clock signals are designed to serve multiple functions simultaneously. Each clock signal is used to control different emission control lines at different time periods, allowing the same clock signal to perform multiple emission control tasks. This multi-functional approach reduces the overall number of clock signals needed while maintaining comprehensive emission control coverage.
2Reliability
If traditional four clock signals are used to drive emission control line driver, then the driver can achieve proper emission control function, but the number of bonding zones increases
Solution Approach 1:
The patent merges multiple clock signal inputs into three unified clock signal lines, directly reducing the number of bonding zones required. By consolidating the clock signal generation and distribution into a three-signal system, the physical number of bonding connections between the emission control line driver and external signal sources is reduced, simplifying the overall device structure.
3Area of stationary object
If three clock signals are used instead of four, then the circuit area is saved and bonding zones are reduced, but the driver stage configuration becomes more complex
Solution Approach 1:
The driver is divided into multiple driver stages, with each stage responsible for controlling a specific emission control line. Each driver stage includes transistors configured to respond to the three clock signals in a specific sequence, allowing the complex three-signal control logic to be distributed across multiple simpler stages rather than concentrated in a single complex unit.
Solution Approach 2:
The driver stages are designed with dynamic timing characteristics where each stage activates at different time periods based on the clock signals. This dynamic segmentation allows the three clock signals to control multiple emission lines sequentially, reducing the need for simultaneous complex control logic in a single stage.
Data Source
AI summary
A display driver comprises a plurality of driver stages. For each stage, a source node of a first transistor is coupled to a first power supply, a gate node is coupled to a first node, and a drain node is coupled to a first output end. A source node of a second transistor is coupled to the first output end and a gate node of is coupled to a second controller and a drain node is electrically coupled to a first input end. The first controller is coupled to a second input end and a third input end to provide sampled signals to the first node and a second output end. The second controller is coupled to the first controller and a second power supply. The first output end of each driver stage is coupled to the third input end of the next driver stage.