Display Data Driver DAC Architecture Without HVMOS Level Shifters
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Solution Overview
Problem
The integration of high-voltage MOSFETs (HVMOS) in data driving circuits for display devices is hindered by their large area requirements and the need for level shifters, making it difficult to integrate these circuits into integrated chips (ICs) effectively.
Innovation Solution
A data driving circuit utilizing a low-voltage MOSFET (LVMOS) configuration with a resistor string and multiple digital-to-analog converters, including a main and sub converter, and a voltage synthesizer to generate analog data voltages, allowing for efficient conversion of digital signals into analog voltages with reduced area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If high-voltage MOSFETs (HVMOS) are used in data driving circuits, then the analog data voltage range can be increased for high image quality, but the circuit area increases and integration into IC becomes difficult
Solution Approach 1:
The patent changes the voltage parameter from high-voltage to low-voltage operation. By using LVMOS instead of HVMOS and implementing a novel DAC architecture with resistor strings and voltage synthesizers, the circuit achieves the required analog voltage range while operating at low voltage, thereby reducing the circuit area and enabling IC integration.
2Use of energy by moving object
If high-voltage MOSFETs (HVMOS) are used in data driving circuits, then the analog data voltage range can be increased for high image quality, but the device complexity increases due to additional level shifters
Solution Approach 1:
The patent extracts and eliminates the level shifter component from the circuit architecture. By using LVMOS and designing the DAC to directly generate the required voltage levels without level shifting, the circuit complexity is reduced while maintaining the analog voltage range necessary for high image quality.
Solution Approach 2:
The patent implements a multi-functional DAC architecture where the same circuit components (resistor strings, switches, voltage synthesizers) perform multiple functions including voltage generation, scaling, and synthesis, eliminating the need for separate level shifter circuits and reducing overall device complexity.
3Area of stationary object
If low-voltage MOSFET (LVMOS) is used instead of high-voltage MOSFET, then the circuit area is reduced and integration is easier, but the analog data voltage generation capability must be maintained
Solution Approach 1:
The patent segments the analog voltage generation into multiple functional blocks: resistor strings for voltage division, switches for signal selection, and voltage synthesizers for final voltage construction. This segmentation allows LVMOS to be used while maintaining the required analog voltage generation capability through coordinated operation of multiple low-voltage components.
Solution Approach 2:
The patent introduces intermediate voltage nodes and resistor strings as mediators between the digital input signals and the final analog output. These intermediary components enable the LVMOS-based circuit to generate the required analog data voltage range by combining multiple lower voltage levels through resistive division and synthesis.
Data Source
AI summary
A data driving circuit includes: a resistor string in which a plurality of resistors are connected in series; and a plurality of data channels connected to a high voltage node, intermediate voltage nodes, and a low voltage node of the resistor string and configured to convert a digital data signal into an analog data voltage. Each of the plurality of data channels includes: a main digital-to-analog converter connected to the high voltage node, the intermediate voltage nodes, and the low voltage node, a multiplier connected to an output terminal of the main digital-to-analog converter, a sub digital-to-analog converter connected to some of the high voltage node, the intermediate voltage nodes, and the low voltage node, and a voltage synthesizer connected to an output terminal of the multiplier and an output terminal of the sub digital-to-analog converter.