Display Driver Level Shifters Prevent Glitches Without Size Increase
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Solution Overview
Problem
Display driver integrated circuits (DDIs) for mobile devices face challenges in achieving compactness and low power consumption while preventing glitches in gradation patterns, which often require increasing circuit size and power consumption.
Innovation Solution
The implementation of a display panel driving device and source driver that utilizes multiple level shifters to process digital signals, including a most significant bit (MSB) and non-MSB, without increasing circuit size, by using a decoder and level shifters with specific input and output terminals to manage signal inversion and output, thereby reducing glitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the size and power consumption of a DDI are increased to address glitches in gradation patterns, then the reliability is improved, but the compactness and power efficiency deteriorate
Solution Approach 1:
The patent divides the digital signal processing into multiple independent level shifters, each handling specific bits (MSB and non-MSB) separately. This segmentation allows each level shifter to be optimized independently, preventing glitches without requiring a monolithic increase in circuit size. The decoder is also segmented to process inverted and non-inverted signals through different paths.
Solution Approach 2:
The patent applies inversion by providing both inverted and non-inverted versions of digital signals to different level shifters. The MSB is processed through one path while its inverted version is processed through another path, and these paths are then combined. This inversion strategy eliminates glitches by ensuring proper signal timing and level alignment without increasing overall circuit complexity.
2Reliability
If the size and power consumption of a DDI are increased to address glitches in gradation patterns, then the reliability is improved, but the power consumption increases
Solution Approach 1:
By segmenting the signal processing into multiple specialized level shifters that handle specific bits independently, the patent reduces the power consumption of each individual component. Each level shifter operates at optimized voltage levels for its specific function, preventing unnecessary power dissipation across the entire circuit while maintaining glitch-free operation.
Solution Approach 2:
The patent changes voltage parameters by using different voltage levels for inverted and non-inverted signals in different level shifters. This parameter optimization allows each circuit component to operate at the minimum necessary voltage level, reducing overall power consumption while preventing glitches through proper voltage level matching and timing.
3Reliability
If multiple level shifters with separate processing paths are used, then glitches are prevented, but the device complexity increases
Solution Approach 1:
The patent merges the outputs of multiple level shifters (processing MSB and non-MSB separately) into a unified digital signal output. The decoder combines inverted and non-inverted signal paths in a structured manner. This merging approach maintains signal integrity and prevents glitches while presenting a relatively simple interface to the rest of the system, masking the internal complexity.
Solution Approach 2:
The level shifters and decoder are designed with multi-functionality, handling both inverted and non-inverted signals through the same basic circuit architecture. This universal design reduces the need for completely separate circuits for different signal types, thereby reducing overall device complexity while maintaining the benefits of separate processing paths for glitch prevention.
Data Source
AI summary
A display driver includes first and second level shifters, respectively receiving a digital signal's most significant bit (MSB) and the digital signal's non-MSB. The first level shifter includes a first input terminal, a first output terminal via which a signal input to the first input terminal is output, a second input terminal, and a second output terminal via which a signal input to the second input terminal is output. The second level shifter includes a third input terminal, a third output terminal via which a signal input to the third input terminal is output, a fourth input terminal, and a fourth output terminal via which a signal input to the fourth input terminal is output. The first input terminal receives an inverted MSB, the second input terminal receives the MSB, the third input terminal receives the non-MSB, and the fourth input terminal receives the inverted non-MSB.