Display Driver Interconnect Layout for Reduced Data Line Delay
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Solution Overview
Problem
The time taken for a data signal to be applied to a data line in a display device increases due to resistance in signal transmission paths, leading to reduced image quality.
Innovation Solution
The display device incorporates a substrate with a circuit array layer and light-emitting array layer, featuring multiple conductive layers with specific materials and configurations to reduce signal transmission resistance, including data supply lines and output lines in different conductive layers, and a display driver circuit in a subsidiary area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If data lines are made longer to cover more display areas, then the display coverage is improved, but the signal transmission time increases due to increased resistance
Solution Approach 1:
The patent introduces a vertical dimension by routing data lines through multiple conductive layers (first, second, third, and fourth conductive layers) rather than relying solely on horizontal extensions. This multi-layer approach allows signal transmission in three-dimensional space, effectively reducing the horizontal path length while maintaining full display coverage.
Solution Approach 2:
The data transmission path is segmented across multiple conductive layers with intermediate connection points. The first data lines are in the first conductive layer, second data lines are in the second conductive layer, and they connect through contact holes, creating a segmented multi-level transmission pathway that reduces overall transmission distance.
2Reliability
If data lines are routed through multiple layers to reduce resistance, then the signal transmission quality is improved, but the circuit array layer structure becomes more complex
Solution Approach 1:
The conductive layers serve multiple functions: the first and second conductive layers contain both pixel driver circuits and data lines, while the third and fourth conductive layers primarily contain data lines. The contact holes serve dual purposes by electrically connecting different conductive layers while maintaining structural integration. This multi-functionality reduces the need for separate dedicated structures.
Solution Approach 2:
The patent merges the data line routing function with the existing conductive layer structure of the circuit array layer. Instead of adding separate routing layers, the data lines are integrated into the first, second, third, and fourth conductive layers that already exist for pixel driver functionality, combining multiple functions into unified structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces signal transmission time, prevents signal write-time shortages, and enhances image quality by compensating for threshold voltage differences and parasitic capacitors, thereby improving overall display performance.
Implementation Method 1
The signal transmission paths between data lines and a display driver circuit are made of a conductive material, and thus they have a resistance proportional to their length
Data Source
AI summary
A display device includes a substrate, a circuit array layer including a plurality of pixel drivers and data lines, a light-emitting array layer, and a display driver circuit supplying data driving signals to the data lines. The circuit array layer includes a structure including a semiconductor layer, a first conductive layer on a first gate insulator, a second conductive layer on a second gate insulator, a third conductive layer on an interlayer dielectric layer, a fourth conductive layer on a first planarization layer, and a second planarization layer. Data supply lines are electrically connected to output terminals of the display driver circuit, and each of data supply lines is disposed in the third conductive layer or the fourth conductive layer.