Display Data Driver Output Circuit for Polarity Switching
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Solution Overview
Problem
Existing output circuits for liquid crystal display apparatuses face challenges in efficiently switching between positive and negative voltages due to limitations in switch configuration, particularly with N-channel and P-channel transistor switches, leading to issues with voltage differences and control across polarities, which complicates high-speed driving and increases the risk of switch failure.
Innovation Solution
The proposed output circuit employs P-channel and N-channel transistor switches with source follower circuits to control the output selection switches, allowing for efficient switching between positive and negative voltages by generating in-phase gate voltages and managing reference power supply voltages, thereby reducing the risk of voltage differences and enabling simple polarity control across switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a single conductive transistor switch (N-channel or P-channel) is used for polarity inversion, then the withstanding voltage of the switch can be reduced to half the liquid crystal drive voltage range, but the control complexity increases and high-speed driving becomes difficult due to the need to secure sufficient drive time for voltage transitions
Solution Approach 1:
The patent divides the single switch control function into two separate switches: a first switch (P-channel) for positive voltage output and a second switch (N-channel) for negative voltage output. Each switch is controlled independently by dedicated control circuits, eliminating the need for complex polarity control and enabling high-speed switching without requiring extended drive time for voltage transitions.
Solution Approach 2:
The patent creates a universal switching architecture where each switch type (P-channel and N-channel) handles one polarity, making the control logic simpler and more predictable. This multi-functional approach allows each switch to operate within its optimal voltage range without interfering with the other polarity's switching requirements.
2Reliability
If polarity inversion is performed by switching between positive and negative drive voltages, then degradation of the liquid crystal panel is prevented, but the risk of voltage difference exceeding switch withstanding voltage increases when output terminal does not sufficiently approach reference power supply voltage
Solution Approach 1:
The patent applies beforehand cushioning by using a P-channel switch for positive voltage output, where the gate voltage can be controlled to be lower than the source voltage by the threshold voltage. This creates a built-in voltage margin that prevents the gate-source voltage difference from exceeding the switch's withstanding voltage, even when the output terminal voltage has not yet fully transitioned to the reference power supply voltage.
3Area of moving object
If output selection switches are configured with low withstanding voltage (half of liquid crystal drive voltage range), then the switch size and area can be reduced, but complementary switches with P-channel and N-channel transistors become unsuitable due to control difficulties across polarities
Solution Approach 1:
The patent segments the polarity control function into separate P-channel and N-channel switches, each optimized for its specific voltage polarity. This segmentation allows each switch to have low withstanding voltage (half the total voltage range) while maintaining ease of control, as each switch type operates within a unipolar control scheme rather than requiring bidirectional polarity control.
Data Source
AI summary
An output circuit includes a first switch that outputs a positive voltage signal received via a first node when in an ON state, a second switch that outputs a negative voltage signal received via a second node when in an ON state, third and fourth switches that set the first and second nodes to a reference power supply voltage when in an ON state, a first follower circuit that generates, as a gate voltage, a voltage signal following and being in phase with a voltage signal of the first node through source follower operation and supplies the gate voltage to a gate of the first switch, and a second follower circuit that generates, as a gate voltage, a voltage signal following and being in phase with a voltage signal of the second node through source follower operation and supplies the gate voltage to a gate of the second switch.