Display Panel Driver Layout With Overlapping Power Bus for Narrow Bezels
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Solution Overview
Problem
The existing display panel driver circuits occupy a large space, making it difficult to reduce the bezel width and achieve a higher screen-to-body ratio.
Innovation Solution
The display panel design includes a driver circuit with a second power signal bus that partially overlaps the driver circuit, and a unilateral or bilateral driving method to minimize bezel area, combined with a multi-layered power signal bus structure to reduce voltage drop and parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the driver circuit is designed to provide drive signals for pixel units, then the display panel can function properly, but the driver circuit occupies large space making it difficult to reduce bezel width
Solution Approach 1:
The patent transitions from a planar layout to a three-dimensional stacked architecture. The driver circuit is divided into multiple levels (first level, second level, third level) stacked vertically, with each level containing different functional blocks. This vertical stacking allows the driver circuit to occupy less horizontal space in the bezel region while maintaining all necessary functions, thereby reducing bezel width without compromising display functionality.
Solution Approach 2:
The driver circuit is segmented into multiple independent functional levels. The first level contains first drive signal generation units, the second level contains second drive signal generation units, and the third level contains third drive signal generation units. Each level can be independently designed and optimized, allowing for efficient space utilization and reduced overall footprint in the bezel region.
2Reliability
If the driver circuit is placed in the bezel region to control pixel circuits, then the display can operate, but the overlapping of power signal bus and driver circuit causes voltage drop and parasitic capacitance
Solution Approach 1:
The patent introduces a light shielding layer as an intermediary between the power signal bus and the driver circuit. This light shielding layer serves dual purposes: it shields the driver circuit from light interference and acts as a shielding layer to reduce parasitic capacitance between the power signal bus and the driver circuit, thereby reducing energy loss without affecting display operation.
Solution Approach 2:
The patent resolves the voltage drop issue by routing power signal buses through multiple vertical levels rather than relying on horizontal connections. Power signal buses are provided at different levels (first level, second level, third level) and connect to corresponding drive signal generation units vertically, reducing the length of power signal transmission paths and minimizing voltage drop.
Data Source
AI summary
Provided are a display panel and a display device. The display panel includes a driver circuit and a pixel circuit, a light-emitting element, and a first power signal bus and a second power signal bus. The light-emitting element includes a first electrode and a second electrode. The first power signal bus is connected to the pixel circuit, the pixel circuit is connected to the first electrode, and the second power signal bus is connected to the second electrode. The second power signal bus at least partially overlaps the driver circuit. The driver circuit includes a first driver circuit and a second driver circuit, the display panel includes a first signal line group and a second signal line group. The first signal line group is connected to the first driver circuit, and the second signal line group is connected to the second driver circuit.