Display Driver Register Block for Command Processing Load Reduction
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Solution Overview
Problem
In high-speed serial interfaces like MIPI, the existing systems face challenges in efficiently transmitting and executing commands during video mode, leading to increased load on the application processor due to temporary storage and potential errors in command execution.
Innovation Solution
A display driver with a register block and command processing unit that sequentially stores and executes commands across multiple frames, utilizing a first and second register to manage command storage and execution, allowing commands to be processed during the back porch of frames, thereby reducing the load on the application processor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If commands are transmitted and executed during video mode in existing systems, then command processing can occur, but the application processor load increases due to temporary storage requirements
Solution Approach 1:
The patent extracts the command storage function from the application processor and relocates it to the display driver's register block. The register block includes a first register for receiving commands during video mode and a second register for executing commands during command mode, thereby removing the temporary storage burden from the application processor while maintaining efficient command processing
Solution Approach 2:
The register block acts as an intermediary between the application processor and the command processing unit. It receives commands during video mode, stores them temporarily, and then transfers them to the command processing unit for execution during command mode, enabling decoupled operation that reduces application processor load
2Reliability
If commands are stored in a single register, then the structure is simple, but command execution errors may occur during mode transitions
Solution Approach 1:
The register block is segmented into two distinct registers: a first register for receiving and storing commands during video mode, and a second register for holding commands ready for execution during command mode. This segmentation ensures that command reception and execution are separated into different time periods, preventing execution errors during mode transitions while maintaining a relatively simple overall structure
Data Source
AI summary
A display driver and an image signal processing system including the same, the display driver including a register block configured to sequentially store commands received from an application processor through a data lane, and a command processing unit configured to sequentially execute the commands during a plurality of frames.